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ZHCSDF6F October 2014 – December 2021 MSP430FR4131 , MSP430FR4132 , MSP430FR4133

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

PM|64
- MTQF008B
DGG|48
- MPDS583
DGG|56
- MPDS570

散热焊盘机械数据 (封装 | 引脚)

订购信息

8.12.10.1 JTAG and Spy-Bi-Wire Interface

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		V_CC	MIN	TYP	MAX	UNIT
f_SBW	Spy-Bi-Wire input frequency	2 V, 3 V	0		10	MHz
t_SBW,Low	Spy-Bi-Wire low clock pulse duration	2 V, 3 V	0.028		15	µs
t_{SBW, En}	Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge) ⁽¹⁾	2 V, 3 V			110	µs
t_SBW,Rst	Spy-Bi-Wire return to normal operation time		15		100	µs
f_TCK	TCK input frequency, 4-wire JTAG ⁽²⁾	2 V	0		16	MHz
f_TCK	TCK input frequency, 4-wire JTAG ⁽²⁾	3 V	0		16	MHz
R_internal	Internal pulldown resistance on TEST	2 V, 3 V	20	35	50	kΩ

(1) Tools that access the Spy-Bi-Wire interface must wait for the t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the first SBWTCK clock edge.

(2) f_TCK may be restricted to meet the timing requirements of the module selected.