ZHCSJA6B January 2019 – December 2021 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| Vsdhs | SDHS power domain supply voltage | Vsdhs = Vuss | 1.52 | 1.6 | 1.65 | V | |
| Isdhs_product | Operating supply current into AVCC and DVCC | Includes PLL, PGA, SDHS, and DTC, modulator clock = 80 MHz, output data rate = 8 Msps | 5.2 | mA | |||
| Fm | Modulator clock(1) | 68 | 80 | MHz | |||
| BWmod | Frequency at -3dB SNR | Modulator clock = 80 MHz, modulator only (no filter is enabled) | 1.5 | MHz | |||
| SNR | Signal-to-noise ratio(2) | Bandwidth from 200 kHz to 1.5 MHz, PGA gain: a gain from the PGA gain table for the maximum SNR | Input signal level = 1000 mVpp, PVCC = 3.0 V, Fm = 80 MHz, OSR = 20 | 58.5 | 62.5 | dB | |
| Bandwidth from 200 kHz to 1.5 MHz, PGA gain: a gain from the PGA gain table for the maximum SNR | Input signal level = 760 mVpp, PVCC = 2.5 V, Fm = 80 MHz, OSR = 20 | 57.5 | 62 | ||||
| Bandwidth from 200 kHz to 1.5 MHz, PGA gain: a gain from the PGA gain table for the maximum SNR | Input signal level = 200 mVpp, PVCC = 2.5 V, Fm = 80 MHz, OSR = 20 | 54.5 | 57 | ||||
| Bandwidth from 200 kHz to 1.5 MHz, PGA gain: a gain from the PGA gain table for the maximum SNR | Input signal level = 100 mVpp, PVCC = 2.5 V, Fm = 80 MHz, OSR = 20 | 49 | 53 | ||||
| Bandwidth from 200 kHz to 1.5 MHz, PGA gain: a gain from the PGA gain table for the maximum SNR | Input signal level = 30 mVpp, PVCC = 2.5 V, Fm = 80 MHz, OSR = 20 | 38.5 | 43 | ||||
| TMOD_Settle | SDHS settling time (PGA + Modulator) | TM2 - TM1, AUTOSSDIS = 0, 1% of settled DC level | 40 | µs | |||
| TM2 - TM1, AUTOSSDIS = 1, 1% of settled DC level | 40 | ||||||
| DROUTsdhs | Output data rate | 8 | Msps | ||||