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ZHCSJA6B January 2019 – December 2021 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431

PRODUCTION DATA

封装选项

机械数据 (封装 | 引脚)

PM|64
- MTQF008B
RGC|64
- MPQF125F

散热焊盘机械数据 (封装 | 引脚)

订购信息

9.13.1 Digital I/O

Up to eight 8-bit I/O ports are implemented:

All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt conditions is possible.
Programmable pullup or pulldown on all ports.
Edge-selectable interrupt and LPM3.5 and LPM4.5 wakeup input capability is available for all pins of ports P1, P2, P3, P4, P5, P6, and P7.
Read and write access to port control registers is supported by all instructions.
Ports P1/P2, P3/P4, P5/P6, P7/(P8) can be accessed byte-wise or word-wise in pairs.
No cross-currents during start-up.

Note:

Configuration of Digital I/Os After BOR Reset

To prevent any cross currents during start-up of the device, all port pins are high-impedance with Schmitt triggers and their module functions disabled. To enable the I/O functionality after a BOR reset, the ports must be configured first and then the LOCKLPM5 bit must be cleared. For details, refer to the "Configuration After Reset" section of the Digital I/O chapter in the MSP430FR58xx, MSP430FR59xx, and MSP430FR6xx Family User's Guide.