4.1 Pin Diagrams

Figure 4-1 shows the 48-pin RGZ package for the MSP430FR586x and MSP430FR586x1 MCUs.

NOTE:

TI recommends connecting the QFN package pad to V_SS.

NOTE:

On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX

NOTE:

On devices with I²C BSL: P1.6: BSLSDA; P1.7: BSLSCL

Figure 4-1 48-Pin RGZ Package (Top View) – MSP430FR586x and MSP430FR586x1

Figure 4-2 shows the 40-pin RHA package for the MSP430FR584x and MSP430FR584x1 MCUs (LFXT only).

NOTE:

TI recommends connecting the QFN package pad to V_SS.

NOTE:

On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX

NOTE:

On devices with I²C BSL: P1.6: BSLSDA; P1.7: BSLSCL

Figure 4-2 40-Pin RHA Package (Top View) – MSP430FR584x and MSP430FR584x1

Figure 4-3 shows the 38-pin DA package for the MSP430FR584x MCUs (LFXT only).

NOTE:

On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX

Figure 4-3 38-Pin DA Package (Top View) – MSP430FR584x

Figure 4-4 shows the 40-pin RHA package for the MSP430FR585x MCUs (HFXT only).

NOTE:

TI recommends connecting the QFN package pad to V_SS.

NOTE:

On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX

Figure 4-4 40-Pin RHA Package (Top View) – MSP430FR585x

Figure 4-5 shows the 38-pin DA package for the MSP430FR585x MCUs (HFXT only).

NOTE:

On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX

Figure 4-5 38-Pin DA Package (Top View) – MSP430FR585x