7.2.3.2 Design Requirements

The hardware design requirements are specific to the use case and are most affected by the specification of the interaction of the chosen analog or digital sensors with the analog front ends (AFE1 an AFE2) of the ESI. However, when designing the sensor circuit, the other digital parts of the ESI module, namely the preprocessing unit (PPU), the processing state machine (PSM) with its associated RAM, the timing state machine (TSM), and the Timer_A output stage must also be considered to ensure that the processing as required by the application can be performed in an autonomous manner inside the ESI. See the Extended Scan Interface (ESI) chapter of the MSP430FR58xx, MSP430FR59xx, MSP430FR68xx, and MSP430FR69xx Family User's Guide for additional information regarding the design requirements and constraints of the module.