Table 6-1 summarizes the available family
members.
Table 6-1 Device Comparison
| DEVICE(1) |
FLASH (KB) |
SRAM (KB) |
SD24 CONVERTERS |
MULTIPLIER |
Timer_A(2) |
eUSCI_A:
UART, IrDA,
SPI |
eUSCI_B:
SPI,
I2C |
I/O |
PACKAGE |
| MSP430i2041 |
32 |
2 |
4 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
| MSP430i2040 |
16 |
1 |
4 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
| MSP430i2031 |
32 |
2 |
3 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
| MSP430i2030 |
16 |
1 |
3 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
| MSP430i2021 |
32 |
2 |
2 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
| MSP430i2020 |
16 |
1 |
2 |
1 |
3, 3 |
1 |
1 |
16 |
32 RHB |
| 12 |
28 PW |
(1) For the most current part, package, and ordering information for all available devices, see the
Package Option Addendum
in
Section 12, or see the TI website at
www.ti.com.
(2) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers
and PWM output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.