ZHCSTL4B October 2023 – May 2024 MSPM0C1103 , MSPM0C1104
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
PARAMETERS | TEST CONDITIONS | Standard mode | Fast mode | Fast mode plus | UNIT | ||||
---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | ||||
fI2C | I2C input clock frequency | I2C in Power Domain0 | 24 | 24 | 24 | MHz | |||
fSCL | SCL clock frequency | 100 | 400 | 1000 | kHz | ||||
tHD,STA | Hold time (repeated) START | 4 | 0.6 | 0.26 | us | ||||
tLOW | LOW period of the SCL clock | 4.7 | 1.3 | 0.5 | us | ||||
tHIGH | High period of the SCL clock | 4 | 0.6 | 0.26 | us | ||||
tSU,STA | Setup time for a repeated START | 4.7 | 0.6 | 0.26 | us | ||||
tHD,DAT | Data hold time | 0 | 0 | 0 | ns | ||||
tSU,DAT | Data setup time | 250 | 100 | 50 | ns | ||||
tSU,STO | Setup time for STOP | 4 | 0.6 | 0.26 | us | ||||
tBUF | bus free time between a STOP and START condition | 4.7 | 1.3 | 0.5 | us | ||||
tVD;DAT | data valid time | 3.45 | 0.9 | 0.45 | us | ||||
tVD;ACK | data valid acknowledge time | 3.45 | 0.9 | 0.45 | us |