TI recommends connecting a combination of a 10-µF and a 0.1-µF low-ESR ceramic decoupling capacitor to the VDD and VSS pins. Higher-value capacitors can be used but can affect the supply rail ramp-up time. Decoupling capacitors must be placed as close as possible to the pins (within a few millimeters).

PA1 and NRST are double bonded for some variants. If it's used as a NRST, it must connect an external 47-kΩ pullup resistor with a 10-nF pulldown capacitor.

For 5V-tolerant open drain (ODIO), a pullup resistor is required to output high for I2C and UART functions if the ODIO are used.

Figure 9-1 Typical Application Schematic