ZHCSOH5B December   1997  – November 2024 OPA134 , OPA2134 , OPA4134

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information - OPA134
    5. 5.5 Thermal Information - OPA2134
    6. 5.6 Thermal Information - OPA4134
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Total Harmonic Distortion
      2. 6.2.2 Distortion Measurements
      3. 6.2.3 Source Impedance and Distortion
      4. 6.2.4 Phase Reversal Protection
      5. 6.2.5 Output Current Limit
    3. 6.3 Functional Block Diagram
    4. 6.4 Device Functional Modes
      1. 6.4.1 Noise Performance
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Operating Voltage
      2. 7.1.2 Offset Voltage Trim
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 模拟滤波器设计器
        2. 8.1.1.2 TINA-TI™ 仿真软件(免费下载)
        3. 8.1.1.3 TI 参考设计
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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Pin Configuration and Functions

OPA134 OPA2134 OPA4134 OPA134: D Package, 8-Pin
                        SOIC, and P Package, 8-Pin PDIP (Top View) Figure 4-1 OPA134: D Package, 8-Pin SOIC, and P Package, 8-Pin PDIP (Top View)
Pin Functions: OPA134
PIN TYPE DESCRIPTION
NAME NO.
+IN 3 Input Noninverting input
–IN 2 Input Inverting input
NC 1, 5 Do not connect these pins(1)
NC 8 No internal connection. Float this pin.
Output 6 Output Output
V+ 7 Power Positive power supply
V– 4 Power Negative power supply
Existing layouts for the OPA134 before revision B of this data sheet do not need to be redesigned.
OPA134 OPA2134 OPA4134 OPA2134: D Package, 8-Pin
                    SOIC, and P Package, 8-Pin PDIP (Top View) Figure 4-2 OPA2134: D Package, 8-Pin SOIC, and P Package, 8-Pin PDIP (Top View)
Table 4-1 Pin Functions: OPA2134
PIN TYPE DESCRIPTION
NAME NO.
+IN A 3 Input Noninverting input, channel A
+IN B 5 Input Noninverting input, channel B
–IN A 2 Input Inverting input, channel A
–IN B 6 Input Inverting input, channel B
OUT A 1 Output Output, channel A
OUT B 7 Output Output, channel B
V+ 8 Power Positive (highest) power supply
V– 4 Power Negative (lowest) power supply
OPA134 OPA2134 OPA4134 OPA4134: D Package, 14-Pin
                    SOIC (Top View) Figure 4-3 OPA4134: D Package, 14-Pin SOIC (Top View)
Table 4-2 Pin Functions: OPA4134
PIN TYPE DESCRIPTION
NAME NO.
+IN A 3 Input Noninverting input, channel A
+IN B 5 Input Noninverting input, channel B
+IN C 10 Input Noninverting input, channel C
+IN D 12 Input Noninverting input, channel D
–IN A 2 Input Inverting input, channel A
–IN B 6 Input Inverting input, channel B
–IN C 9 Input Inverting input, channel C
–IN D 13 Input Inverting input, channel D
OUT A 1 Output Output, channel A
OUT B 7 Output Output, channel B
OUT C 8 Output Output, channel C
OUT D 14 Output Output, channel D
V+ 4 Power Positive (highest) power supply
V– 11 Power Negative (lowest) power supply