ZHCSE47A September 2015 – June 2022 OPA1688
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Applications and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
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- DRG|8
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7.6 Typical Characteristics
at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
Table 7-1 List of Typical
Characteristics
| DESCRIPTION | FIGURE |
|---|---|
| Offset Voltage Production Distribution | Figure 7-1 |
| Offset Voltage Drift Distribution | Figure 7-2 |
| Offset Voltage vs Temperature (VS = ±18 V) | Figure 7-3 |
| Offset Voltage vs Common-Mode Voltage (VS = ±18 V) | Figure 7-4 |
| Offset Voltage vs Common-Mode Voltage (Upper Stage) | Figure 7-5 |
| Offset Voltage vs Power Supply | Figure 7-6 |
| Input Bias Current vs Common-Mode Voltage | Figure 7-7 |
| Input Bias Current vs Temperature | Figure 7-8 |
| Output Voltage Swing vs Output Current (Maximum Supply) | Figure 7-9 |
| CMRR and PSRR vs Frequency (Referred-to-Input) | Figure 7-10 |
| CMRR vs Temperature | Figure 7-11 |
| PSRR vs Temperature | Figure 7-12 |
| 0.1-Hz to 10-Hz Noise | Figure 7-13 |
| Input Voltage Noise Spectral Density vs Frequency | Figure 7-14 |
| THD+N Ratio vs Frequency | Figure 7-15 |
| THD+N vs Output Amplitude | Figure 7-16 |
| THD+N vs Frequency | Figure 7-17 |
| THD+N vs Amplitude | Figure 7-18 |
| Quiescent Current vs Temperature | Figure 7-19 |
| Quiescent Current vs Supply Voltage | Figure 7-20 |
| Open-Loop Gain and Phase vs Frequency | Figure 7-21 |
| Closed-Loop Gain vs Frequency | Figure 7-22 |
| Open-Loop Gain vs Temperature | Figure 7-23 |
| Open-Loop Output Impedance vs Frequency | Figure 7-24 |
| Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) | Figure 7-25, Figure 7-26 |
| Positive Overload Recovery | Figure 7-27, Figure 7-28 |
| Negative Overload Recovery | Figure 7-29, Figure 7-30 |
| Small-Signal Step Response (10 mV, G = –1) | Figure 7-31 |
| Small-Signal Step Response (10 mV, G = 1) | Figure 7-32 |
| Small-Signal Step Response (100 mV, G = –1) | Figure 7-33 |
| Small-Signal Step Response (100 mV, G = 1) | Figure 7-34 |
| Large-Signal Step Response (10 V, G = –1) | Figure 7-35 |
| Large-Signal Step Response (10 V, G = 1) | Figure 7-36 |
| Large-Signal Settling Time (10-V Positive Step) | Figure 7-37 |
| Large-Signal Settling Time (10-V Negative Step) | Figure 7-38 |
| No Phase Reversal | Figure 7-39 |
| Short-Circuit Current vs Temperature | Figure 7-40 |
| Maximum Output Voltage vs Frequency | Figure 7-41 |
| EMIRR vs Frequency | Figure 7-42 |
| Channel Separation vs Frequency | Figure 7-43 |
| Distribution taken from 5185 amplifiers | ||
| 5 typical units shown, VS = ±18 V |
| 5 typical units shown, VS = ±18 V |
| TA = 25°C |
| Peak-to-peak noise = 1.70 µVPP |
| VOUT = 3.5 VRMS, BW = 50 kHz |
| POUT = 10 mW, BW = 80 kHz, VS = ±5 V |
| CLOAD = 15 pF |
| RL = 10 kΩ |
| G = –1 |
| 10 mV, G = –1, RL = 1 kΩ, CL = 10 pF |
| 100 mV, G = –1, RL = 1 kΩ, CL = 10 pF |
| 10 V, G = –1, RL = 1 kΩ, CL = 10 pF |
| G = 1, CL = 10 pF, 0.1% settling = ±10 mV |
| Distribution taken from 47 amplifiers, TA = –40°C to +125°C |
| 5 typical units shown, VS = ±18 V |
| 5 typical units shown, VS = ±2.25 V to ±18 V |
| f = 1 kHz, BW = 80 kHz |
| f = 1 kHz, BW = 80 kHz, VS = ±5 V |
| G = 1 |
| 10 mV, G = 1, CL = 10 pF |
| 100 mV, G = 1, CL = 10 pF |
| 10 V, G = 1, CL = 10 pF |
| G = 1, CL = 10 pF, 0.1% settling = ±10 mV |
| PRF = –10 dBm, VSUPPLY = ±18 V, VCM = 0 V |