米6体育平台手机版

ZHCSSH3A September 2000 – September 2023 OPA177

PRODUCTION DATA

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

散热焊盘机械数据 (封装 | 引脚)

订购信息

6.5 Electrical Characteristics

at T_A = 25°C, V_S = 30 V (±15 V), V_CM = V_OUT = V_S / 2, and R_L = 2 kΩ connected to V_S/ 2 (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
OFFSET VOLTAGE
VOS	Input offset voltage	F grade			±10	±25	µV
		G grade			±20	±60
		T_A = –40°C to +85°C	F grade		±15	±40
		T_A = –40°C to +85°C	G grade		±20	±100
dV_OS/dT	Input offset voltage drift	T_A = –40°C to +85°C	F grade		±0.1	±0.3	µV/°C
dV_OS/dT	Input offset voltage drift	T_A = –40°C to +85°C	G grade		±0.7	±1.2	µV/°C
	Offset adjustment range	R_P = 20 kΩ			±3		mV
	Long-term drift⁽¹⁾	F grade			0.3		µV/mo
	Long-term drift⁽¹⁾	G grade			0.4		µV/mo
PSRR	Power-supply rejection ratio	V_S= ±3 V to ±18 V	F grade	115	125		dB
		V_S= ±3 V to ±18 V	G grade	110	120
		V_S= ±3 V to ±18 V T_A = –40°C to +85°C	F grade	110	120
		V_S= ±3 V to ±18 V T_A = –40°C to +85°C	G grade	106	115
INPUT BIAS CURRENT
I_B	Input bias current	F grade			±0.5	±2	nA
		G grade			±0.5	±2.8
		T_A = –40°C to +85°C	F grade		±0.5	±4
		T_A = –40°C to +85°C	G grade		±0.5	±6
	Input bias current drift⁽²⁾	T_A = –40°C to +85°C	F grade		±8	±40	pA/°C
	Input bias current drift⁽²⁾	T_A = –40°C to +85°C	G grade		±15	±60	pA/°C
I_OS	Input offset current	F grade			±0.3	±1.5	nA
		G grade			±0.3	±2.8
		T_A = –40°C to +85°C	F grade		±0.5	±2.2
		T_A = –40°C to +85°C	G grade		±0.5	±4.5
NOISE
	Input bias current drift⁽²⁾	F grade			±1.5	±40	pA/°C
	Input bias current drift⁽²⁾	G grade			±1.5	±85	pA/°C
	Input voltage noise	f =1 Hz to 100 Hz⁽³⁾			85	150	nV_rms
	Input current noise	f =1 Hz to 100 Hz			45		pA_rms
INPUT VOLTAGE
V_CM	Common-mode voltage range⁽⁴⁾			±13	±14		V
V_CM	Common-mode voltage range⁽⁴⁾	T_A = –40°C to +85°C		±13	±13.5		V
CMRR	Common-mode rejection ratio	V_CM = ±13 V	F grade	130	140		dB
		V_CM = ±13 V	G grade	115	140
		V_CM = ±13 V T_A = –40°C to +85°C	F grade	120	140
		V_CM = ±13 V T_A = –40°C to +85°C	G grade	110	140
INPUT IMPEDANCE
R_in	Input resistance	Differential mode⁽⁵⁾	F grade	26	45		MΩ
		Differential mode⁽⁵⁾	G grade	18.5	45		MΩ
		Common-mode			200		GΩ
OPEN-LOOP GAIN
A_OL	Open-loop voltage gain⁽⁶⁾	–10 V ≤ V_O ≤ 10 V	F grade	134	141		dB
		–10 V ≤ V_O ≤ 10 V	G grade	126	135
		–10 V ≤ V_O ≤ 10 V T_A = –40°C to +85°C	F grade	126	135
		–10 V ≤ V_O ≤ 10 V T_A = –40°C to +85°C	G grade	120	132
FREQUENCY RESPONSE
BW_CL	Closed-loop bandwidth	G = 1		0.4	0.6		MHz
SR	Slew rate			0.1	0.3		V/µs
OUTPUT
V_O	Voltage output swing	R_L ≥ 2 kΩ		±13.5	±14		V
		R_L ≥ 2 kΩ	T_A = –40°C to +85°C	±12	±13
		R_L ≥ 10 kΩ		±12.5	±13
		R_L ≥ 1 kΩ		±12	±12.5
I_SC	Short-circuit current				±35		mA
R_O	Open-loop output resistance				60		Ω
POWER SUPPLY
	Power consumption	I_O = 0 A			40	60	mW
	Power consumption	I_O = 0 A	T_A = –40°C to +85°C		60	75	mW
I_Q	Quiescent current	I_O = 0 A			1.3	2	mA
I_Q	Quiescent current	I_O = 0 A	T_A = –40°C to +85°C		2	2.5	mA

(1) Long-term input offset voltage stability refers to the averaged trend line of V_OS vs time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V_OS during the first 30 operating days are typically less than 2 μV.

(2) Specified by characterization.

(3) Sample tested.

(4) Specified CMRR test condition.

(5) Specified by design.

(6) To maintain high open-loop gain throughout the ±10-V output range, A_OL is tested at –10 V ≤ V_O ≤ 0 V, 0 V ≤ V_O ≤ +10 V, and –10 V ≤ V_O ≤ +10 V.