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ZHCSHU3A March 2018 – January 2021 OPA197-Q1 , OPA2197-Q1 , OPA4197-Q1

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DGK|8
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6.9 Typical Characteristics

at T_A = 25°C, V_S = ±18 V, V_CM = V_S / 2, R_LOAD = 10 kΩ connected to V_S / 2, and C_L = 100 pF, (unless otherwise noted)

Table 6-1 Table of Graphs

DESCRIPTION	FIGURE
Offset Voltage Production Distribution	Figure 6-1 to Figure 6-6
Offset Voltage Drift Distribution	Figure 6-7 to Figure 6-8
Offset Voltage vs Temperature	Figure 6-9
Offset Voltage vs Common-Mode Voltage	Figure 6-10 to Figure 6-12
Offset Voltage vs Power Supply	Figure 6-13
Open-Loop Gain and Phase vs Frequency	Figure 6-14
Closed-Loop Gain and Phase vs Frequency	Figure 6-15
Input Bias Current vs Common-Mode Voltage	Figure 6-16
Input Bias Current vs Temperature	Figure 6-17
Output Voltage Swing vs Output Current (maximum supply)	Figure 6-18
CMRR and PSRR vs Frequency	Figure 6-19
CMRR vs Temperature	Figure 6-20
PSRR vs Temperature	Figure 6-21
0.1-Hz to 10-Hz Noise	Figure 6-22
Input Voltage Noise Spectral Density vs Frequency	Figure 6-23
THD+N Ratio vs Frequency	Figure 6-24
THD+N vs Output Amplitude	Figure 6-25
Quiescent Current vs Supply Voltage	Figure 6-26
Quiescent Current vs Temperature	Figure 6-27
Open Loop Gain vs Temperature	Figure 6-28
Open Loop Output Impedance vs Frequency	Figure 6-29
Small Signal Overshoot vs Capacitive Load (100-mV Output Step)	Figure 6-30, Figure 6-31
No Phase Reversal	Figure 6-32
Positive Overload Recovery	Figure 6-33
Negative Overload Recovery	Figure 6-34
Small-Signal Step Response (100 mV)	Figure 6-35, Figure 6-36
Large-Signal Step Response	Figure 6-37
Settling Time	Figure 6-38 to Figure 6-41
Short-Circuit Current vs Temperature	Figure 6-42
Maximum Output Voltage vs Frequency	Figure 6-43
Propagation Delay Rising Edge	Figure 6-44
Propagation Delay Falling Edge	Figure 6-45
Crosstalk vs Frequency	Figure 6-46

Figure 6-1 Offset Voltage Production Distribution at 25°C

T_A = 85°C

Figure 6-3 Offset Voltage Production Distribution at 85°C

T_A = –25°C

Figure 6-5 Offset Voltage Production Distribution at –25°C


T_A = –40°C to +125°C

Figure 6-7 Offset Voltage Drift Distribution from
–40°C to +125°C

Figure 6-9 Offset Voltage vs Temperature

Figure 6-11 Offset Voltage vs Common-Mode Voltage

	V_S = ±2.25 V to ±18 V

Figure 6-13 Offset Voltage vs Power Supply

Figure 6-15 Closed-Loop Gain and Phase vs Frequency

Figure 6-17 Input Bias Current vs Temperature

Figure 6-19 CMRR and PSRR vs Frequency

Figure 6-21 PSRR vs Temperature

Figure 6-23 Input Voltage Noise Spectral Density vs Frequency

f = 1 kHz, BW = 80 kHz

Figure 6-25 THD+N vs Output Amplitude

Figure 6-27 Quiescent Current vs Temperature

Figure 6-29 Open-Loop Output Impedance vs Frequency

	G = 1

Figure 6-31 Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)

R_I = 1 kΩ	R_F = 10 kΩ	G = –10

Figure 6-33 Positive Overload Recovery

C_L = 10 pF	G = 1

Figure 6-35 Small-Signal Step Response (100 mV)

R_L = 1 kΩ	C_L = 10 pF	G = –1

Figure 6-37 Large-Signal Step Response

	G = 1

Figure 6-39 Settling Time (5-V Positive Step)

G = 1

Figure 6-41 Settling Time (5-V Negative Step)

Figure 6-43 Maximum Output Voltage vs Frequency

Figure 6-45 Propagation Delay Falling Edge

T_A = 125°C

Figure 6-2 Offset Voltage Production Distribution at 125°C

T_A = 0°C

Figure 6-4 Offset Voltage Production Distribution at 0°C

T_A = –40° C

Figure 6-6 Offset Voltage Production Distribution at –40°C


T_A = 0°C to 85°C

Figure 6-8 Offset Voltage Drift Distribution from 0°C to 85°C

Figure 6-10 Offset Voltage vs Common-Mode Voltage

	V_S = ±2.25 V

Figure 6-12 Offset Voltage vs Common-Mode Voltage

	C_LOAD = 15 pF

Figure 6-14 Open-Loop Gain and Phase vs Frequency

Figure 6-16 Input Bias Current vs Common-Mode Voltage

Figure 6-18 Output Voltage Swing vs Output Current (Maximum Supply)

Figure 6-20 CMRR vs Temperature

Figure 6-22 0.1-Hz to 10-Hz Noise

V_OUT = 3.5 V_RMS	BW = 80 kHz

Figure 6-24 THD+N Ratio vs Frequency

Figure 6-26 Quiescent Current vs Supply Voltage

R_L = 10 kΩ

Figure 6-28 Open-Loop Gain vs Temperature

R_I = 1 kΩ	R_F = 1 kΩ	G = –1

Figure 6-30 Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)

Figure 6-32 No Phase Reversal

R_I = 1 kΩ	G = –10	R_F = 10 kΩ

Figure 6-34 Negative Overload Recovery

R_L = 1 kΩ	C_L = 10 pF	G = –1

Figure 6-36 Small-Signal Step Response (100 mV)

	G = 1

Figure 6-38 Settling Time (10-V Positive Step)

	G = 1

Figure 6-40 Settling Time (10-V Negative Step)

Figure 6-42 Short-Circuit Current vs Temperature

Figure 6-44 Propagation Delay Rising Edge

Figure 6-46 Crosstalk vs Frequency