ZHCSUD7B May   1998  – May 2024 OPA130 , OPA2130 , OPA4130

PRODUCTION DATA  

  1.   1
  2. 1特性
  3. 2应用
  4. 3说明
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information - OPA130
    4. 5.4 Thermal Information - OPA2130
    5. 5.5 Thermal Information - OPA4130
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Operating Voltage
      2. 6.1.2 Offset Voltage Trim
      3. 6.1.3 Input Bias Current
    2. 6.2 Typical Application
  8. 7Device and Documentation Support
    1. 7.1 接收文档更新通知
    2. 7.2 支持资源
    3. 7.3 Trademarks
    4. 7.4 静电放电警告
    5. 7.5 术语表
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

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Pin Configuration and Functions

OPA130 OPA2130 OPA4130 OPA130 D Package, 8-Pin SOIC
                    (Top View) Figure 4-1 OPA130 D Package, 8-Pin SOIC (Top View)
Table 4-1 Pin Functions: OPA130
PIN TYPE DESCRIPTION
NAME NO.
+IN 3 Input Noninverting input, channel A
–IN 2 Input Inverting input, channel A
NC 1, 5 Do not connect these pins(1)
NC 8 No internal connection. Float this pin.
OUT 6 Output Output
V+ 7 Power Positive (highest) power supply
V– 4 Power Negative (lowest) power supply
Existing layouts for the OPA130 D package before revision B of this data sheet do not need to be redesigned.
OPA130 OPA2130 OPA4130 OPA2130 D Package, 8-Pin SOIC
                    (Top View) Figure 4-2 OPA2130 D Package, 8-Pin SOIC (Top View)
Table 4-2 Pin Functions: OPA2130
PIN TYPE DESCRIPTION
NAME NO.
+IN A 3 Input Noninverting input, channel A
+IN B 5 Input Noninverting input, channel B
–IN A 2 Input Inverting input, channel A
–IN B 6 Input Inverting input, channel B
OUT A 1 Output Output, channel A
OUT B 7 Output Output, channel B
V+ 8 Power Positive (highest) power supply
V– 4 Power Negative (lowest) power supply
OPA130 OPA2130 OPA4130 OPA4130 D Package, 14-Pin SOIC
                    (Top View) Figure 4-3 OPA4130 D Package, 14-Pin SOIC (Top View)
Table 4-3 Pin Functions: OPA4130
PIN TYPE DESCRIPTION
NAME NO.
+IN A 3 Input Noninverting input, channel A
+IN B 5 Input Noninverting input, channel B
+IN C 10 Input Noninverting input, channel C
+IN D 12 Input Noninverting input, channel D
–IN A 2 Input Inverting input, channel A
–IN B 6 Input Inverting input, channel B
–IN C 9 Input Inverting input, channel C
–IN D 13 Input Inverting input, channel D
OUT A 1 Output Output, channel A
OUT B 7 Output Output, channel B
OUT C 8 Output Output, channel C
OUT D 14 Output Output, channel D
V+ 4 Power Positive (highest) power supply
V– 11 Power Negative (lowest) power supply