ZHCSJA0F June 2010 – March 2023 OPA140 , OPA2140 , OPA4140
PRODUCTION DATA
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | OPA140 | |||
D
(SOIC), DGK (VSSOP) |
DBV (SOT) | |||
+IN | 3 | 3 | Input | Noninverting input |
–IN | 2 | 4 | Input | Inverting input |
NC | 1, 5, 8 | — | — | No internal connection (can be left floating) |
OUT | 6 | 1 | Output | Output |
V+ | 7 | 5 | — | Positive (highest) power supply |
V– | 4 | 2 | — | Negative (lowest) power supply |
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | OPA2140 | OPA4140 | ||
D (SOIC),
DGK (VSSOP), DRG (SON) |
D
(SOIC), PW (TSSOP) |
|||
+IN A | 3 | 3 | Input | Noninverting input, channel A |
+IN B | 5 | 5 | Input | Noninverting input, channel B |
+IN C | — | 10 | Input | Noninverting input, channel C |
+IN D | — | 12 | Input | Noninverting input, channel D |
–IN A | 2 | 2 | Input | Inverting input, channel A |
–IN B | 6 | 6 | Input | Inverting input, channel B |
–IN C | — | 9 | Input | Inverting input, channel C |
–IN D | — | 13 | Input | Inverting input, channel D |
OUT A | 1 | 1 | Output | Output, channel A |
OUT B | 7 | 7 | Output | Output, channel B |
OUT C | — | 8 | Output | Output, channel C |
OUT D | — | 14 | Output | Output, channel D |
V+ | 8 | 4 | — | Positive (highest) power supply |
V– | 4 | 11 | — | Negative (lowest) power supply |
Thermal Pad | DRG Package only | — | — | Thermal pad is internally connected to V−. Solder the thermal pad to a heat spreading plane on the board connected to V−. For DRG package only. |