ZHCSEI8C January   2016  – March 2018 OPA197 , OPA2197 , OPA4197

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      OPA197 应用于高压多路复用数据采集系统
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions: OPA197
    2.     Pin Functions: OPA2197 and OPA4197
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA197
    5. 6.5 Thermal Information: OPA2197
    6. 6.6 Thermal Information: OPA4197
    7. 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
    8. 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase Reversal Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 Common-Mode Voltage Range
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 16-Bit Precision Multiplexed Data-Acquisition System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Slew Rate Limit for Input Protection
      3. 8.2.3 Precision Reference Buffer
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 TINA-TI(免费软件下载)
        2. 11.1.1.2 TI 高精度设计
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 相关链接
    4. 11.4 接收文档更新通知
    5. 11.5 社区资源
    6. 11.6 商标
    7. 11.7 静电放电警告
    8. 11.8 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Capacitive Load and Stability

The OPAx197 features a patented output stage capable of driving large capacitive loads, and in a unity-gain configuration, directly drives up to 1 nF of pure capacitive load. Increasing the gain enhances the ability of the amplifier to drive greater capacitive loads; see Figure 47 and Figure 48. The particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation.

OPA197 OPA2197 OPA4197 D030_SBOS737.gifFigure 47. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step, G = –1 V/V)
OPA197 OPA2197 OPA4197 D031_SBOS737.gifFigure 48. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step, G = 1 V/V)

For additional drive capability in unity-gain configurations, improve capacitive load drive by inserting a small
(10-Ω to 20-Ω) resistor, RISO, in series with the output, as shown in Figure 49. This resistor significantly reduces ringing while maintaining dc performance for purely capacitive loads. However, if there is a resistive load in parallel with the capacitive load, a voltage divider is created, introducing a gain error at the output and slightly reducing the output swing. The error introduced is proportional to the ratio RISO / RL, and is generally negligible at low output levels. A high capacitive load drive makes the OPA197 well suited for applications such as reference buffers, MOSFET gate drives, and cable-shield drives. The circuit shown in Figure 49 uses an isolation resistor, RISO, to stabilize the output of an op amp. RISO modifies the open-loop gain of the system for increased phase margin, and results using the OPA197 are summarized in Table 3. For additional information on techniques to optimize and design using this circuit, TI Precision Design TIDU032 details complete design goals, simulation, and test results.

OPA197 OPA2197 OPA4197 ai_fig1excapload_bos5165663.gifFigure 49. Extending Capacitive Load Drive with the OPA197

Table 3. OPA197 Capacitive Load Drive Solution Using Isolation Resistor Comparison of Calculated and Measured Results

PARAMETER VALUE
Capacitive Load 100 pF 1000 pF 0.01 µF 0.1 µF 1 µF
Phase Margin 45° 60° 45° 60° 45° 60° 45° 60° 45° 60°
RISO (Ω) 47.0 360.0 24.0 100.0 20.0 51.0 6.2 15.8 2.0 4.7
Measured Overshoot (%) 23.2 8.6 10.4 22.5 9.0 22.1 8.7 23.1 8.6 21.0 8.6
Calculated PM 45.1° 58.1° 45.8° 59.7° 46.1° 60.1° 45.2° 60.2° 47.2° 60.2°
OPA197 OPA2197 OPA4197 apps_tipd_logo_bas557.gif
For step-by-step design procedure, circuit schematics, bill of materials, printed circuit board (PCB) files, simulation results, and test results, refer to TI Precision Design TIDU032, Capacitive Load Drive Solution using an Isolation Resistor .