ZHCSD45 December   2014 OPA2277-EP

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 称重放大器原理图
  5. 5 修订历史记录
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Offset Voltage Adjustment
        2. 9.2.2.2 Input Protection
        3. 9.2.2.3 Input Bias Current Cancellation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Board Layout
      2. 11.2.2 Measurement Tips
  12. 12器件和文档支持
    1. 12.1 商标
    2. 12.2 静电放电警告
    3. 12.3 术语表
  13. 13机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings(1)

over operating free-air temperature (unless otherwise noted)
MIN MAX UNIT
Supply voltage 36 V
Input voltage (V–) – 0.7 (V+) + 0.7 V
Output short-circuit (to ground)(2) Continuous
Operating temperature –55 125 °C
Junction temperature 150 °C
Lead temperature (soldering, 10 s) 300 °C
Tstg Storage temperature range –55 125 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) One channel per package.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Machine model (MM) ±100
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Specified voltage range ±5 ±15 V
Operating voltage range ±2 ±18 V
TJ Operating junction temperature –55 125 °C

7.4 Thermal Information

THERMAL METRIC(1) OPA2277 UNIT
D
8 PINS
RθJA Junction-to-ambient thermal resistance 91.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 39.9
RθJB Junction-to-board thermal resistance 40.6
ψJT Junction-to-top characterization parameter 3.9
ψJB Junction-to-board characterization parameter 39.6
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Electrical Characteristics

At TA = 25°C, VS = ±5 V to ±15 V, RL = 2 kΩ (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±20 ±65 µV
vs temperature, TJ = –55°C to 125°C ±150 µV
vs temperature (dVOS/dT), TJ = –55°C to 125°C ±0.15 µV/°C
vs power supply (PSRR) VS = ±2 V to ±18 V ±0.3 ±1 µV/V
TJ = –55°C to 125°C VS = ±2 V to ±18 V ±1
vs time 0.2 µV/mo
Channel separation (dual) dc 0.1 µV/V
INPUT BIAS CURRENT
IB Input bias current ±0.5 ±2.8 nA
TJ = –55°C to 125°C ±7
IOS Input offset current ±0.5 ±2.8 nA
TJ = –55°C to 125°C ±7
NOISE
Input voltage noise, ƒ = 0.1 to 10 Hz 0.22 µVpp
0.035 µVrms
en Input voltage noise density ƒ = 10 Hz 12 nV/√Hz
ƒ = 100 Hz 8
ƒ = 1 Hz 8
ƒ = 10 Hz 8
in Current noise density ƒ = 1 kHz 0.2 pA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) + 2 (V+) – 2 V
CMRR Common-mode rejection
TJ = –55°C to 125°C		 VCM = (V–) + 2 V to (V+) – 2 V 115 140 dB
VCM = (V–) + 2 V to (V+) – 2 V 115 dB
INPUT IMPEDANCE
Differential 100 || 3 MΩ || pF
Common-mode VCM = (V–) + 2 V to (V+) – 2 V 250 || 3 GΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain
TJ = –55°C to 125°C		 VO = (V–) + 0.5 V to (V+) – 1.2 V,
RL = 10 kΩ		 140 dB
VO = (V–) + 1.5 V to (V+) – 1.5 V,
RL = 2 kΩ		 126 134
VO = (V–) + 1.5 V to (V+) – 1.5 V,
RL = 2 Ω		 126
FREQUENCY RESPONSE
GBW Gain bandwidth product 1 MHz
SR Slew rate 0.8 V/µs
Settling time 0.1% VS = ±15 V, G = 1, 10-V step 14 µs
0.01% VS = ±15 V, G = 1, 10-V step 16 µs
Overload recovery time VIN x G = VS 3 µs
Total harmonic distortion + noise
(THD + N)		 ƒ = 1 kHz, G = 1, VO = 3.5 Vrms 0.002%
OUTPUT
VO Voltage output RL = 10 kΩ (V–) + 0.5 (V+) – 1.2 V
RL = 10 kΩ, TJ = –55°C to 125°C (V–) + 0.5 (V+) – 1.2
RL = 2 kΩ (V–) + 1.5 (V+) – 1.5
RL = 2 kΩ, TJ = –55°C to 125°C (V–) + 1.5 (V+) – 1.5
ISC Short-circuit current ±35 mA
CLOAD Capacitive load drive See Typical Characteristics
POWER SUPPLY
VS Specified voltage range ±5 ±15 V
Operating voltage range ±2 ±18 V
IQ Quiescent current (per amplifier)
TJ = –55°C to 125°C		 IO = 0 A ±790 ±825 µA
IO = 0 A ±900 µA
TEMPERATURE RANGE
Specified temperature range –55 125 °C
Operating temperature range –55 125 °C
Tstg Storage temperature range –55 125 °C

7.5 Typical Characteristics

At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.
graph1_sbos714.gif
Figure 1. Open-Loop Gain/Phase vs Frequency
graph3_sbos714.gif
Figure 3. Input Noise and Current Noise Spectral Density vs Frequency
graph5_sbos714.gif
Figure 5. Channel Separation vs Frequency
graph7_sbos714.gif
Figure 7. Offset Voltage Production Distribution
graph9_sbos714.gif
Figure 9. Warm-Up Offset Voltage Drift
graph11_sbos714.gif
Figure 11. Input Bias Current vs Temperature
graph15_sbos714.gif
Figure 13. Quiescent Current vs Supply Voltage
graph17_sbos714.gif
Figure 15. Maximum Output Voltage vs Frequency
graph19_sbos714.gif
Figure 17. Small-Signal Overshoot vs Load Capacitance
graph21_sbos714.gif
G = 1 CL = 0 pF VS = 15 V
Figure 19. Small-Signal Step Response
graph2_sbos714.gif
Figure 2. Power Supply and Common-Mode Rejection vs Frequency
graph4_sbos714.gif
Figure 4. Input Noise Voltage vs Time
graph6_sbos714.gif
VOUT = 3.5 Vrms
Figure 6. Total Harmonic Distortion + Noise vs Frequency
graph8_sbos714.gif
Figure 8. Offset Voltage Drift Production Distribution
graph10_sbos714.gif
Figure 10. AOL, CMR, PSR vs Temperature
graph12_sbos714.gif
Figure 12. Quiescent Current and Short-Circuit Current vs Temperature
graph16_sbos714.gif
10-V step CL = 1500 pF
Figure 14. Settling Time vs Closed-Loop Gain
graph18_sbos714.gif
Figure 16. Output Voltage Swing vs Output Current
graph20_sbos714.gif
G = 1 CL = 1500 pF VS = 15 V
Figure 18. Large-Signal Step Response
graph22_sbos714.gif
G = 1 CL = 1500 pF VS = 15 V
Figure 20. Small-Signal Step Response
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