ZHCSH34E November   2017  – August 2021 OPA2375 , OPA375

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information for Single Channel
    5. 7.5 Thermal Information for Dual Channel
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics: OPA375
    8. 7.8 Typical Characteristics: OPA2375
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 THD + Noise Performance
      2. 8.3.2 Operating Voltage
      3. 8.3.3 Rail-to-Rail Output
      4. 8.3.4 EMI Rejection
      5. 8.3.5 Electrical Overstress
      6. 8.3.6 Typical Specifications and Distributions
      7. 8.3.7 Shutdown Function
      8. 8.3.8 Packages With an Exposed Thermal Pad
      9. 8.3.9 Common Mode Voltage Range
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Single-Supply Electret Microphone Preamplifier With Speech Filter
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

Electrical Characteristics

OPA2375/4375 Specifications: VS = (V+) – (V–) = 1.8 V to 5.5 V (±0.9 V to ±2.75 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VO UT = VS / 2, unless otherwise noted.
OPA375 Specifications: VS = (V+) – (V–) = 5.5 V at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VO UT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VS = 5.0 V ±0.15 ±0.5 mV
TA = –40°C to 125°C OPA2/4375(3) ±0.7
dVOS/dT Input offset voltage drift TA = –40°C to 125°C OPA375(2) ±0.35 ±2(4) µV/℃
OPA2/4375(3) ±0.16
PSRR Input offset voltage versus power supply VS = 2.25 V to 5.5 V, VCM = V– OPA375(2) ±0.32 ±6.3 μV/V
VVCM = V– OPA2/4375(3) ±0.7 ±5.8
Channel separation f = 20 kHz 130 dB
INPUT BIAS CURRENT
IB Input bias current OPA375(2) ±10 pA
OPA2/4375(3) ±3
IOS Input offset current OPA375(2) ±10
OPA2/4375(3) ±0.5
NOISE
EN Input voltage noise f  = 0.1 to 10 Hz   1.2 μVPP
  0.227   µVRMS
eN Input voltage noise density f = 10 Hz OPA2/4375(3)   30   nV/√Hz
f = 1 kHz OPA375(2)   5.0  
OPA2/4375(3) 4.6
f = 10 kHz OPA375(2) 3.7
OPA2/4375(3)   3.5  
iN Input current noise f = 1 kHz   23 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) (V+) -1.2 V
CMRR Common-mode rejection ratio (V–) < VCM < (V+) – 1.2 V OPA375(2) 95 120 dB
VS = 1.8 V, (V–) < VCM < (V+) – 1.2 V OPA2/4375(3) 87 100
VS = 5.5, (V–) < VCM < (V+) – 1.2 V 94 110
INPUT CAPACITANCE
ZID Differential 10 || 6 MΩ || pF
ZICM Common-mode 10 || 6 GΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 40 mV < VO < (V+) – 40 mV, RL = 10 kΩ to VS/2 OPA375(2) 125 dB
(V–) + 150 mV < VO < (V+) – 150 mV, RL = 2 kΩ to VS/2 110 130
VS= 1.8 V, (V–) + 150 mV < VO < (V+) – 150 mV, RL = 2 kΩ to VS/2 OPA2/4375(3) 107 130
VS= 5.5 V, (V–) + 150 mV < VO < (V+) – 150 mV, RL = 2 kΩ to VS/2 140
VS = 1.8 V, (V–) + 40m V < VO < (V+) – 40 mV, RL = 10 kΩ to VS/2 110 132
VS = 5.5 V, (V–) + 40m V < VO < (V+) – 40 mV, RL = 10 kΩ to VS/2 142
FREQUENCY RESPONSE
GBW Gain-bandwidth product 10 MHz
SR Slew rate VS = 5.5 V, G = +1, CL = 20 pF 4.6 V/μs
tS Settling time To 0.1%, VS = 5.5 V, VSTEP = 2 V, G = +1, CL = 20pF 0.65 μs
To 0.01%, VS = 5.5 V, VSTEP = 2 V, G = +1, CL = 20pF 1.2
Phase margin G = +1, RL = 10kΩ, CL = 20 pF 55 °
Overload recovery time VIN  × gain > VS 0.2 μs
THD+N Total harmonic distortion + noise VS = 5.5 V, VCM = 2.5 V, VO = 1 VRMS, G = +1, f = 1 kHz, RL = 10 kΩ OPA375(2) 0.00035 %
OPA2/4375(3) 0.00015
EMIRR Electro-magnetic interference rejection ratio f = 1 GHz OPA2/4375(3) 51 dB
OUTPUT
  Voltage output swing from rail Positive/Negative rail headroom VS = 5.5 V, RL = 10k OPA375(2)   8 10 mV
Positive rail headroom VS = 5.5 V, RL = no load OPA2/4375(3)   7
VS = 5.5 V, RL = 2 kΩ   35
VS = 5.5 V, RL = 10 kΩ   5 14
Negative rail headroom VS = 5.5 V, RL = no load   7
VS = 5.5 V, RL = 2 kΩ   35
VS = 5.5 V, RL = 10 kΩ   5 14
ISC Short-circuit current OPA2/4375(3) ±68 mA
CLOAD Capacitive load drive See Figure 7-58
ZO Open-loop output impedance f = 10 MHz, IO = 0 A OPA375(2) 160
f = 2 MHz, IO = 0 A OPA2/4375(3) 165
POWER SUPPLY
IQ Quiescent current per amplifier VS = 5.5 V, IO = 0 A OPA375(2) 890 µA
TA = –40°C to 125°C 1100
OPA2/4375(3) 990 1200
TA = –40°C to 125°C 1250
Turn-On Time At TA = 25°C, VS = 5.5 V, VS ramp rate > 0.3 V/µs OPA2/4375(3) 10 μs
SHUTDOWN
IQSD Quiescent current per amplifier All amplifiers disabled, SHDN = V– 1 3.5 µA
ZSHDN Output impedance during shutdown Amplifier disabled 10 || 6 GΩ || pF
VIH Logic high threshold voltage (amplifier enabled) (V–) + 1.1 V V
VIL Logic low threshold voltage (amplifier disabled) (V–) + 0.2 V
tON Amplifier enable time (full shutdown) (1) G = +1, VCM = V-, VO = 0.1 × VS/2 15 µs
Amplifier enable time (partial shutdown)(2) G = +1, VCM = V-, VO = 0.1 × VS/2 8
tOFF Amplifier disable time (1) VCM = V-, VO = VS/2 3
SHDN pin input bias current (per pin) (V+) ≥ SHDN ≥ (V–) + 0.9 V 0.4 µA
(V–) ≤ SHDN ≤ (V–) + 0.7 V 0.25
Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level.
This electrical characteristic only applies to the single-channel, OPA375
This electrical characteristic only applies to the dual-channel OPA2375 and quad-channel OPA4375
Specified by design and characterization; not production tested