9.1.1 Noninverting Amplifier

The OPA2836-Q1 can be used as a noninverting amplifier with a signal input to the noninverting input, V_IN+ . A basic block diagram of the circuit is illustrated in Figure 51.

If V_IN = V_REF + V_SIG, then the output of the amplifier can be calculated according to Equation 1.

Equation 1.

The signal gain of the circuit is set by , and V_REF provides a reference around which the input and output signals swing. Output signals are in-phase with the input signals.

The OPA2836-Q1 is designed for the nominal value of R_F to be 1 kΩ in gains other than +1. This value gives excellent distortion performance, maximum bandwidth, best flatness, and best pulse response. R_F = 1 kΩ must be used as a default unless other design goals require changing to other values. All test circuits used to collect data for this document have R_F = 1 kΩ for all gains other than +1. Gain of +1 is a special case where R_F is shorted and R_G is left open.

9.1.2 Inverting Amplifier

The OPA2836-Q1 can be used as an inverting amplifier with a signal input to the inverting input, V_IN– , through the gain setting resistor R_G. A basic block diagram of the circuit is illustrated in Figure 52.

If V_IN = V_REF + V_SIG, then the output of the amplifier may be calculated according to Equation 2.

Equation 2.

The signal gain of the circuit is set by: , and V_REF provides a reference point around which the input and output signals swing. Output signals are 180° out-of-phase with the input signals. The nominal value of R_F must be 1 kΩ for inverting gains.

9.1.3 Instrumentation Amplifier

Figure 62 is an instrumentation amplifier that combines the high input impedance of the differential-to-differential amplifier circuit and the common-mode rejection of the differential-to-single-ended amplifier circuit. This circuit is often used in applications where high input impedance is required (such as taps from a differential line or in cases where the signal source has a high output impedance).

If V_IN+ = V_CM + V_SIG+ and V_IN– = V_CM + V_SIG– , then the output of the amplifier can be calculated according to Equation 3.

Equation 3.

The signal gain of the circuit is set by . V_CM is rejected and V_REF provides a level shift around which the output signal swings. The single-ended output signal is in-phase with the differential input signal.

Figure 62. Instrumentation Amplifier

Integrated solutions are available, but the OPA2836-Q1 provides a much lower-power, high-frequency solution. For best CMRR performance, resistors must be matched. Given that CMRR ≈ the resistor tolerance, a 0.1% tolerance provides apprximately 60-dB CMRR.

9.1.4 Attenuators

The noninverting circuit of Figure 51 has a minimum gain of 1. To implement attenuation, a resistor divider can be placed in series with the positive input, and the amplifier can be set for a gain of 1 by shorting V_OUT to V_IN– and removing R_G. Because the operational amplifier input has high input impedance, the attenuation is set by the resistor divider.

The inverting circuit of Figure 52 can be used as an attenuator by making R_G larger than R_F. The attenuation is simply the resistor ratio. For example, a 10:1 attenuator can be implemented with R_F = 1 kΩ and R_G = 10 kΩ.

9.1.5 Single-Ended-to-Differential Amplifier

Figure 63 illustrates an amplifier circuit that is used to convert single-ended signals to differential and that provides gain and level shifting. This circuit can be used for converting signals to differential in applications (such as line drivers for Cat5 cabling or for driving differential-input SAR and ΔΣ ADCs).

With V_IN = V_REF + V_SIG , the output of the amplifier can be calculated according to Equation 4.

Equation 4.

The differential-signal gain of the circuit is 2 × G, and V_REF provides a reference around which the output signal swings. The differential output signal is in-phase with the single-ended input signal.

Figure 63. Single-Ended-to-Differential Amplifier

Line termination on the output can be accomplished with resistors R_O. The differential input impedance of the circuit is 2 × R_O. For example, if a 100-Ω Cat5 cable is used with double termination, the amplifier is typically set for a differential gain of 2 V/V (6 dB) with R_F = 0 Ω (short), R_G = open, 2R = 1 kΩ, R1 = 0 Ω, R = 499 Ω to balance the input bias currents, and R_O = 49.9 Ω for output line termination. This configuration is shown in Figure 64.

For driving a differential-input ADC, the situation is similar but the output resistors (R_O) are typically chosen along with a capacitor across the ADC input for optimum filtering and settling-time performance.

Figure 64. Cat5 Line Driver With Gain = 2 V/V (6 dB)

9.1.6 Differential-to-Signal-Ended Amplifier

Figure 65 illustrates a differential amplifier that converts differential signals to single-ended and provides gain (or attenuation) and level shifting. This circuit can be used in applications such as a line receiver for converting a differential signal from a Cat5 cable to single ended.

If V_IN+ = V_CM + V_SIG+ and V_IN– = V_CM + V_SIG–, then the output of the amplifier can be calculated according to Equation 5.

Equation 5.

The signal gain of the circuit is set by . V_CM is rejected, and V_REF provides a level shift around which the output signal swings. The single-ended output signal is in-phase with the differential input signal.

Figure 65. Differential to Single Ended Amplifier

Line termination can be accomplished with a resistor shunt across the input. The differential input impedance of the circuit is the resistor value in parallel with the amplifier circuit. For low-gain and low-line impedance, the resistor value to add is approximately the impedance of the line. For example, if a 100-Ω Cat5 cable is used with a gain of 1 amplifier and R_F = R_G = 1 kΩ, adding a 100-Ω shunt across the input gives a differential impedance of 98 Ω that is adequate for most applications.

For best CMRR performance, resistors must be matched. A rule of thumb is CMRR ≈ the resistor tolerance; so a 0.1% tolerance provides approximately 60-dB CMRR.

9.1.7 Differential-to-Differential Amplifier

Figure 66 shows a differential amplifier that is used to amplify differential signals. This circuit has high input impedance and is often used in differential line driver applications where the signal source is a high-impedance driver (for example, a differential DAC) that must drive a line.

If V_IN± = V_CM + V_SIG± , then the output of the amplifier can be calculated according to Equation 6.

Equation 6.

The signal gain of the circuit is set by , and V_CM passes with unity gain. The amplifier in essence combines two noninverting amplifiers into one differential amplifier with the R_G resistor shared, which makes R_G effectively half the value when calculating the gain. The output signals are in-phase with the input signals.

Figure 66. Differential to Differential Amplifier

9.1.8 Pulse Application With Single-Supply

For pulsed applications, where the signal is at ground and pulses to some positive or negative voltage, the circuit bias-voltage considerations are different than with a signal that swings symmetrical about a reference point. Figure 67 shows a pulsed situation where the signal is at ground (0 V) and pulses to a positive value.

Figure 67. Noninverting Single Supply With Pulse

If the input signal pulses negatively from ground, an inverting amplifier is more appropriate, as shown in Figure 68. A key consideration in both noninverting and inverting cases is that the input and output voltages are kept within the limits of the amplifier; because the V_ICR of the OPA2836-Q1 includes the negative supply rail, the OPA2836-Q1 lends itself to this application.

Figure 68. Inverting Single Supply With Pulse

9.1.9 ADC Driver Performance

The OPA2836-Q1 provides excellent performance when driving high-performance, delta-sigma (ΔΣ), and successive approximation register (SAR) ADCs in low-power audio and industrial applications.

To show achievable performance, the OPA2836-Q1 is tested as the drive amplifier for the ADS8326. The ADS8326 is a 16-bit, micro power, SAR ADC with pseudo-differential inputs and sample rates up to 250 kSPS. The ADS8326 offers excellent noise and distortion performance in a small 8-pin SOIC or VSSOP (MSOP) package. Low power and small size make the ADS8326 and OPA2836-Q1 devices an ideal solution for portable and battery-operated systems, for remote data-acquisition modules, simultaneous multichannel systems, and isolated data acquisition.

The circuit shown in Figure 69 is used to test the performance. Figure 70 is the FFT plot showing the spectral performance with a 10-kHz input frequency, and Table 3 shows the tabulated ac analysis results.

Figure 69. OPA2836-Q1 and ADS8326 Test Circuit

Figure 70. ADS8326 and OPA2836-Q1 10-kHz FFT

9.2.1 Audio-Frequency Performance

The OPA2836-Q1 provides excellent audio performance with very low quiescent power. To show performance in the audio band, a 2700 series audio analyzer from Audio Precision is used to test THD+N and FFT at 1-V_RMS output voltage.

Figure 71 shows the test circuit used for the audio-frequency performance application.

The 100-pF capacitor to ground on the input helped to decouple noise pick up in the lab and improved noise performance.

Figure 71. OPA2836-Q1 Audio Precision Analyzer Test Circuit

9.2.1.3 Application Curves

A 10-Ω series resistor can be inserted between the capacitor and the noninverting pin to isolate the capacitance.

Figure 72 shows the THD+N performance with 100-kΩ and 300-Ω loads, with A-weighting and with no weighting. Both loads show similar performance. With no weighting, the THD+N performance is dominated by the noise; whereas, A-weighting provides filtering that improves the noise.

Figure 73 and Figure 74 show FFT outputs with a 1-kHz tone and 100-kΩ and 300-Ω loads. To show relative performance of the device versus the test set, one channel has the OPA2836-Q1 in-line between generator output and analyzer input and the other channel is in Gen Mon loopback mode that internally connects the signal generator to the analyzer input. With a 100-kΩ load, Figure 73, the curves are basically indistinguishable from each other except for noise, meaning that the OPA2836-Q1 cannot be directly measured. With a 300-Ω load, Figure 74, the main difference between the curves is that the OPA2836-Q1 shows slightly higher even-order harmonics, but odd-order harmonics are masked by the test-set performance.

Figure 72. OPA2836-Q1 1 V_RMS, 20-Hz to 80-kHz THD+N

Figure 74. OPA2836-Q1 and AP Gen Mon 10-kHz FFT Plot;
V_OUT = 1 V_RMS, R_L = 300 Ω

Figure 73. OPA2836-Q1 and AP Gen Mon 10-kHz FFT Plot; V_OUT = 1 V_RMS, R_L = 100 kΩ

9.2.2 Active Filters

The OPA2836-Q1 can be used to design active filters. Figure 75 and Figure 76 show MFB and Sallen-Key circuits designed using the WEBENCH® filter designer to implement second-order low-pass Butterworth filter circuits. Figure 77 shows the frequency response.

Figure 75. MFB 100-kHz Second Order Low-Pass Butterworth Filter Circuit

Figure 76. Sallen-Key 100-kHz Second Order Low-Pass Butterworth Filter Circuit

Figure 77. MFB and Sallen-Key Second Order Low-Pass Butterworth Filter Response

MFB and Sallen-Key filter circuits offer similar performance. The main difference is the MFB uses an inverting amplifier in the pass-band and the Sallen-Key uses an noninverting amplifier. The primary advantage for each is the Sallen-Key in unity gain has no resistor gain-error term, and thus no sensitivity to gain error, whereas the MFB has inherently better attenuation properties beyond the bandwidth of the operational amplifier.