For best operational performance, use good printed
circuit board (PCB) layout practices, including:
- Noise can propagate into analog circuitry through
the power connections of the board and propagate
to the power pins of the op amp itself. Bypass
capacitors are used to reduce the coupled noise by
providing a low-impedance path to ground.
- Connect low-ESR, 0.1µF ceramic bypass capacitors
between each supply pin and ground, placed as
close to the device as possible. One bypass
capacitor from V+ to ground is adequate for
single-supply applications.
- Separate grounding for analog and digital
portions of circuitry is one of the simplest and
most effective methods of noise suppression. One
or more layers on multilayer PCBs are usually
devoted to ground planes. A ground plane helps
distribute heat and reduces electromagnetic
interference (EMI) noise pickup. Take care to
physically separate digital and analog grounds,
paying attention to the flow of the ground
current.
- To reduce parasitic coupling, run the input traces as far away from the
supply or output traces as possible. If these traces cannot be kept
separate, then cross the sensitive trace at a 90 degree angle, which is
much better as opposed to running the traces in parallel with the noisy
trace.
- Place the external components as close to the
device as possible, as shown in Layout Example. Keeping R1
and R2 close to the inverting input
minimizes parasitic capacitance.
- Keep the length of input traces as short as
possible. Remember that the input traces are the
most sensitive part of the circuit.
- Consider a driven, low-impedance guard ring
around the critical traces. A guard ring can
significantly reduce leakage currents from nearby
traces that are at different potentials.
- TI recommends cleaning the
PCB following board assembly for best
performance.
- Any precision integrated
circuit can experience performance shifts
resulting from moisture ingress into the plastic
package. Following any aqueous PCB cleaning
process, TI recommends baking the PCB assembly to
remove moisture introduced into the device
packaging during the cleaning process. A
low-temperature, post-cleaning bake at 85°C for 30
minutes is sufficient for most circumstances.