ZHCSFL2D October   2016  – June 2019 OPA2325 , OPA325 , OPA4325

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
    1.     失调电压与输入共模电压间的关系
  3. 3 说明
    1.     可用作 ADC 驱动放大器的 OPAx325
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions: OPA325
    2.     Pin Functions: OPA2325
    3.     Pin Functions: OPA4325
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA325
    5. 6.5 Thermal Information: OPA2325
    6. 6.6 Thermal Information: OPA4325
    7. 6.7 Electrical Characteristics: VS = 2.2 V to 5.5 V or ±1.1 V to ±2.75 V
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Zero-Crossover Input Stage
      2. 7.3.2 Low Input Offset Voltage
      3. 7.3.3 Input and ESD Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Operating Characteristics
      2. 8.1.2 Basic Amplifier Configurations
      3. 8.1.3 Driving an Analog-to-Digital Converter
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 相关链接
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.7 Electrical Characteristics: VS = 2.2 V to 5.5 V or ±1.1 V to ±2.75 V

at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage 40 150 µV
dVOS/dT Input offset voltage drift VS = 5.5 V, TA = –40°C to +125°C 2 7.5 µV/°C
PSRR Power-supply rejection ratio VS = 2.2 V to +5.5 V 6 20 µV/V
VS = 2.2 V to 5.5 V, TA = –40°C to +125°C 15
Channel separation At 1 kHz 130 dB
INPUT VOLTAGE
VCM Common-mode voltage range (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V 100 114 dB
TA = –40°C to +125°C 95
INPUT BIAS CURRENT
IB Input bias current ±0.2 ±10 pA
TA = –40°C to +85°C ±500
TA = –40°C to +125°C ±10 nA
IOS Input offset current ±0.2 ±10 pA
TA = –40°C to +85°C ±500
TA = –40°C to +125°C ±10 nA
NOISE
Input voltage noise f = 0.1 Hz to 10 Hz 2.8 µVPP
en Input voltage noise density f = 1 kHz 10 nV/√Hz
f = 10 kHz 9
in Input current noise density f = 1 kHz 1.3 fA/√Hz
INPUT CAPACITANCE
Differential 5 pF
Common-mode 4 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain 0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ 105 130 dB
0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ,
TA = –40°C to +125°C		 95 128
0.2 V < VO < (V+) – 0.2 V, RL = 2 kΩ 100 110
PM Phase margin G = 1 V/V, VS = 5 V, CL = 15 pF 67 Degrees
FREQUENCY RESPONSE (VS = 5.0 V, CL = 50 pF)
GBP Gain bandwidth product Unity gain 10 MHz
SR Slew rate G = +1 5 V/μs
tS Settling time To 0.1%, 2-V step, G = +1 0.6 µs
To 0.01%, 2-V step, G = +1 1
Overload recovery time VIN × G > VS 200 ns
THD+N Total harmonic distortion + noise(1) VO = 4 VPP, G = +1, f = 10 kHz, RL = 10 kΩ 0.0005%
VO = 2 VPP, G = +1, f = 10 kHz, RL = 600 Ω 0.005%
OUTPUT
VO Voltage output swing from both rails RL = 10 kΩ 10 20 mV
RL = 10 kΩ, TA = –40°C to +125°C 30
RL = 2 kΩ 25 45
RL = 2 kΩ, TA = –40°C to +125°C 55
ISC Short-circuit current VS = 5.5 V See the Typical Characteristics mA
CL Capacitive load drive See the Typical Characteristics
RO Open-loop output resistance IO = 0 mA, f = 1 MHz 180 Ω
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 mA, VS = 5.5 V 0.65 0.75 mA
IO = 0 mA, VS = 5.5 V, TA = –40°C to +125°C 0.8
Power-on time V+ = 0 V to 5 V, to 90% IQ level 28 µs
(1) Third-order filter; bandwidth = 80 kHz at –3 dB.
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