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ZHCSOH5B December 1997 – August 2024 OPA134 , OPA2134 , OPA4134

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D|14
- MPDS177H

散热焊盘机械数据 (封装 | 引脚)

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5.7 Electrical Characteristics

at T_A = 25°C, V_S = ±15V, R_L = 2kΩ connected to midsupply, and V_CM = V_OUT = midsupply (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
AUDIO PERFORMANCE
THD+N	Total harmonic distortion plus noise	f = 1kHz, G = 1, V_O = 3V_rms	R_L = 2kΩ		0.00008		%
THD+N	Total harmonic distortion plus noise	f = 1kHz, G = 1, V_O = 3V_rms	R_L = 600Ω		0.00015		%
	Intermodulation distortion	f = 1kHz, G = 1, V_O = 1V_PP			–98		dB
	Headroom⁽¹⁾	THD < 0.01%, R_L = 2kΩ, V_S = 18V			21.3		dBu
FREQUENCY RESPONSE
GBW	Gain bandwidth product				8		MHz
SR	Slew rate⁽²⁾				±20		V/μs
	Settling time	10V step, G = 1, C_L = 100pF	0.1%		0.7		μs
	Settling time	10V step, G = 1, C_L = 100pF	0.01%		1		μs
FPBW	Full power bandwidth				1.3		MHz
	Overload recovery time	V_IN × G = V_S			0.6		µs
NOISE
	Input voltage noise	f = 20Hz to 20kHz			1.2		µV_rms
e_n	Input voltage noise density	f = 1kHz			8		nV/√Hz
I_n	Input current noise density	f = 1kHz			3		fA/√Hz
OFFSET VOLTAGE
V_OS	Input offset voltage				±1	±3.5	mV
V_OS	Input offset voltage	T_A = –40°C to +85°C			±1		mV
dV_OS/dT	Input offset voltage drift	T_A = –40°C to +85°C			±2		μV/°C
PSRR	Power-supply rejection ratio	5V ≤ V_S ≤ 36V		90	106		dB
	Channel separation (dual, quad)	DC, R_L = 2kΩ			128		dB
	Channel separation (dual, quad)	f = 20kHz, R_L = 2kΩ			126		dB
INPUT BIAS CURRENT
I_B	Input bias current⁽³⁾				±5	±100	pA
I_B	Input bias current⁽³⁾	T_A = –40°C to +85°C			See Section 5.8	±5	nA
I_OS	Input offset current⁽³⁾				±2	±50	pA
INPUT VOLTAGE
V_CM	Common-mode voltage			(V–) + 2.5	±13	(V+) – 3.5	V
CMRR	Common-mode rejection ratio	–12.5V ≤ V_CM ≤ 11.5V		86	100		dB
CMRR	Common-mode rejection ratio	–12.5V ≤ V_CM ≤ 11.5V	TA = –40°C to +85°C		90		dB
INPUT IMPEDANCE
	Differential				10¹³ \|\| 8		Ω \|\| pF
	Common-mode	–12.5V ≤ V_CM ≤ 11.5V			10¹³ \|\| 6		Ω \|\| pF
OPEN-LOOP GAIN
A_OL	Open-loop voltage gain	R_L = 10kΩ, –14.5V ≤ V_O ≤ 13.8V		104	120		dB
A_OL	Open-loop voltage gain	R_L = 2kΩ, –13.8V ≤ V_O ≤ 13.5V		104	120		dB
OUTPUT
V_O	Voltage output	R_L = 10kΩ	Positive	(V+) – 1.2			V
		R_L = 10kΩ	Negative			(V–) + 0.5
		R_L = 2kΩ	Positive	(V+) – 1.5
		R_L = 2kΩ	Negative			(V–) + 1.2
I_SC	Short-circuit current	Sourcing			36		mA
I_SC	Short-circuit current	Sinking			–30		mA
Z_O	Output impedance	f = 10kHz	Closed-loop⁽⁴⁾		0.01		Ω
Z_O	Output impedance	f = 10kHz	Open-loop		10		Ω
	Capacitive load drive	Stable operation		See Typical Characteristics
POWER SUPPLY
I_Q	Quiescent current (per amplifier)	I_O = 0mA			4	5	mA

(1) dBu = 20 × log (V_rms / 0.7746) where V_rms is the maximum output voltage for which THD+Noise is less than 0.01%. See Total Harmonic Distortion.

(2) Proposed by design.

(3) High-speed test at T_J= 25°C.

(4) See Closed-Loop Output Impedance vs Frequency in Typical Characteristics.