ZHCS959D June 2012 – September 2016 OPA4188
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
Supply voltage | ±20 | 40 (single supply) | V | |
Signal input terminals(2) | Voltage | (V–) – 0.5 | (V+) + 0.5 | V |
Current | ±10 | mA | ||
Output short circuit(3) | Continuous | |||
Temperature | Operating, TA | –55 | 150 | °C |
Junction, TJ | 150 | °C | ||
Storage, Tstg | –65 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Power supply voltage, (V+)-(V–) | 4 (±2) | 36 (±18) | V | ||
Ambient temperature, TA | –40 | 125 | °C |
THERMAL METRIC(1) | OPA4188 | UNIT | ||
---|---|---|---|---|
D (SOIC) | PW (TSSOP) | |||
14 PINS | 14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 93.2 | 106.9 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 51.8 | 24.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 49.4 | 59.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 13.5 | 0.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 42.2 | 54.3 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | TA = 25°C | 6 | 25 | μV | ||
dVOS/dT | TA = –40°C to 125°C | 0.03 | 0.085 | μV/°C | |||
PSRR | Power-supply rejection ratio | VS = 4 V to 36 V, VCM = VS / 2 | 0.075 | 0.3 | μV/V | ||
VS = 4 V to 36 V, VCM = VS / 2, TA = –40°C to 125°C |
0.3 | μV/V | |||||
Long-term stability | 4(1) | μV | |||||
Channel separation, DC | 1 | μV/V | |||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | VCM = VS / 2 | ±160 | ±1400 | pA | ||
TA = –40°C to 125°C | ±18 | nA | |||||
IOS | Input offset current | ±320 | ±2800 | pA | |||
TA = –40°C to 125°C | ±6 | nA | |||||
NOISE | |||||||
en | Input voltage noise | f = 0.1 Hz to 10 Hz | 0.25 | μVPP | |||
en | Input voltage noise density | f = 1 kHz | 8.8 | nV/√Hz | |||
in | Input current noise density | f = 1 kHz | 7 | fA/√Hz | |||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | TA = –40°C to 125°C | V– | (V+) – 1.5 | V | ||
CMRR | Common-mode rejection ratio | (V–) < VCM < (V+) – 1.5 V | 120 | 134 | dB | ||
(V–) + 0.5 V < VCM < (V+) – 1.5 V, VS = ±18 V |
130 | 146 | dB | ||||
(V–) + 0.5 V < VCM < (V+) – 1.5 V, VS = ±18 V, TA = –40°C to 125°C |
120 | 126 | dB | ||||
INPUT IMPEDANCE | |||||||
Input impedance | Differential | 100 || 6 | MΩ || pF | ||||
Common-mode | 6 || 9.5 | 1012 Ω || pF | |||||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | (V–) + 500 mV < VO < (V+) – 500 mV, RL = 10 kΩ |
130 | 136 | dB | ||
(V–) + 500 mV < VO < (V+) – 500 mV, RL = 10 kΩ, TA = –40°C to 125°C |
118 | 126 | dB | ||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | 2 | MHz | ||||
SR | Slew rate | G = 1 | 0.8 | V/μs | |||
ts | Settling time | 0.1% | VS = ±18 V, G = 1, 10-V step | 20 | μs | ||
0.01% | VS = ±18 V, G = 1, 10-V step | 27 | μs | ||||
Overload recovery time | VIN × G = VS | 1 | μs | ||||
THD+N | Total harmonic distortion + noise | 1 kHz, G = 1, VOUT = 1 VRMS | 0.0001% | ||||
OUTPUT | |||||||
Voltage output swing from rail | No load | 6 | 15 | mV | |||
RL = 10 kΩ | 220 | 250 | mV | ||||
RL = 10 kΩ, TA = –40°C to 125°C | 310 | 350 | mV | ||||
ISC | Short circuit current | ±18 | mA | ||||
RO | Open-loop output resistance | f = 1 MHz, IO = 0 | 120 | Ω | |||
CLOAD | Capacitive load drive | 1 | nF | ||||
POWER SUPPLY | |||||||
VS | Operating voltage range | 4 to 36 (±2 to ±18) | V | ||||
IQ | Quiescent current (per amplifier) | VS = ±4 V to VS = ±18 V | 415 | 500 | μA | ||
IO = 0 mA, TA = –40°C to 125°C | 570 | μA | |||||
TEMPERATURE RANGE | |||||||
Temperature range | Specified | –40 | 125 | °C | |||
Operating | –55 | 150 | °C | ||||
Storage | –65 | 150 | °C |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | TA = 25°C | 6 | 25 | μV | ||
dVOS/dT | TA = –40°C to 125°C | 0.03 | 0.085 | μV/°C | |||
PSRR | Power-supply rejection ratio | VS = 4 V to 36 V, VCM = VS / 2 | 0.075 | 0.3 | μV/V | ||
VS = 4 V to 36 V, VCM = VS / 2, TA = –40°C to 125°C |
0.3 | μV/V | |||||
Long-term stability | 4(1) | μV | |||||
Channel separation, DC | 1 | μV/V | |||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | VCM = VS / 2 | ±160 | ±1400 | pA | ||
TA = –40°C to 125°C | ±18 | nA | |||||
IOS | Input offset current | ±320 | ±2800 | pA | |||
TA = –40°C to 125°C | ±6 | nA | |||||
NOISE | |||||||
en | Input voltage noise | f = 0.1 Hz to 10 Hz | 0.25 | μVPP | |||
en | Input voltage noise density | f = 1 kHz | 8.8 | nV/√Hz | |||
in | Input current noise density | f = 1 kHz | 7 | fA/√Hz | |||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | V– | (V+) – 1.5 | V | |||
CMRR | Common-mode rejection ratio | (V–) < VCM < (V+) – 1.5 V | 106 | 114 | dB | ||
(V–) + 0.5 V < VCM < (V+) – 1.5 V, VS = ±2 V |
114 | 120 | dB | ||||
(V–) + 0.5 V < VCM < (V+) – 1.5 V, VS = ±2 V, TA = –40°C to 125°C |
108 | 120 | dB | ||||
INPUT IMPEDANCE | |||||||
Input impedance | Differential | 100 || 6 | MΩ || pF | ||||
Common-mode | 6 || 9.5 | 1012 Ω || pF | |||||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | (V–) + 500 mV < VO < (V+) – 500 mV, RL = 10 kΩ |
120 | 130 | dB | ||
(V–) + 500 mV < VO < (V+) – 500 mV, RL = 10 kΩ, TA = –40°C to 125°C |
110 | 120 | dB | ||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | 2 | MHz | ||||
SR | Slew rate | G = 1 | 0.8 | V/μs | |||
Overload recovery time | VIN × G = VS | 1 | μs | ||||
THD+N | Total harmonic distortion + noise | 1 kHz, G = 1, VOUT = 1 VRMS | 0.0001% | ||||
OUTPUT | |||||||
Voltage output swing from rail | No load | 6 | 15 | mV | |||
RL = 10 kΩ | 220 | 250 | mV | ||||
RL = 10 kΩ, TA = –40°C to 125°C | 310 | 350 | mV | ||||
ISC | Short circuit current | ±18 | mA | ||||
RO | Open-loop output resistance | f = 1 MHz, IO = 0 | 120 | Ω | |||
CLOAD | Capacitive load drive | 1 | nF | ||||
POWER SUPPLY | |||||||
VS | Operating voltage range | 4 to 36 (±2 to ±18) | V | ||||
IQ | Quiescent current (per amplifier) | VS = ±2 V to VS = ±4 V | 385 | 465 | μA | ||
IO = 0 mA, TA = –40°C to 125°C | 540 | μA | |||||
TEMPERATURE RANGE | |||||||
Temperature range | Specified | –40 | 125 | °C | |||
Operating | –40 | 125 | °C | ||||
Storage | –65 | 150 | °C |
DESCRIPTION | FIGURE |
---|---|
Offset Voltage Production Distribution | Figure 1 |
Offset Voltage Drift Distribution | Figure 2 |
Offset Voltage vs Temperature | Figure 3 |
Offset Voltage vs Common-Mode Voltage | Figure 4, Figure 5 |
Offset Voltage vs Power Supply | Figure 6 |
IB and IOS vs Common-Mode Voltage | Figure 7 |
Input Bias Current vs Temperature | Figure 8 |
Output Voltage Swing vs Output Current (Maximum Supply) | Figure 9 |
CMRR and PSRR vs Frequency (Referred-to-Input) | Figure 10 |
CMRR vs Temperature | Figure 11, Figure 12 |
PSRR vs Temperature | Figure 13 |
0.1-Hz to 10-Hz Noise | Figure 14 |
Input Voltage Noise Spectral Density vs Frequency | Figure 15 |
THD+N Ratio vs Frequency | Figure 16 |
THD+N vs Output Amplitude | Figure 17 |
Quiescent Current vs Supply Voltage | Figure 18 |
Quiescent Current vs Temperature | Figure 19 |
Open-Loop Gain and Phase vs Frequency | Figure 20 |
Closed-Loop Gain vs Frequency | Figure 21 |
Open-Loop Gain vs Temperature | Figure 22 |
Open-Loop Output Impedance vs Frequency | Figure 23 |
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) | Figure 24, Figure 25 |
No Phase Reversal | Figure 26 |
Positive Overload Recovery | Figure 27 |
Negative Overload Recovery | Figure 28 |
Small-Signal Step Response (100 mV) | Figure 29, Figure 30 |
Large-Signal Step Response | Figure 31, Figure 32 |
Large-Signal Settling Time (10-V Positive Step) | Figure 33 |
Large-Signal Settling Time (10-V Negative Step) | Figure 34 |
Short Circuit Current vs Temperature | Figure 35 |
Maximum Output Voltage vs Frequency | Figure 36 |
Channel Separation vs Frequency | Figure 37 |
EMIRR IN+ vs Frequency | Figure 38 |