米6体育平台手机版

ZHCSI51A May 2018 – June 2018 OPA521

PRODUCTION DATA.

At T_CASE = 25°C, V+ = 15 V, IN+ = (V+) / 2, R_LOAD = 50 Ω unless otherwise noted.

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
DIGITAL INPUTS (ENABLE, IQSET)
	Leakage input current		GND ≤ V_IN ≤ 3.3	–1	0.01	1	µA
V_IH	High-level input voltage				2	3.3	V
V_IL	Low-level input voltage			GND		0.8	V
	EN pin function (active high)	EN pin high	2 < EN < 3.3	Device in normal operation
	EN pin function (active high)	EN pin low	EN < 0.8	Device in shutdown
	IQSET pin function (active high)	IQSET pin high	IQSET > 2	Device in FCC/ARIB mode (I_Q = 78 mA (typ))
	IQSET pin function (active high)	IQSET pin low	IQSET < 0.8	Device in CENELEC mode (I_Q = 51 mA (typ))
DIGITAL OUTPUTS (TFLAG, IFLAG)
I_OH	High-level output current		V_OH = 3.3 V			1	µA
V_OL	Low-level output voltage		I_OL = 4 mA			0.4	V
I_OL	Low-level output current		V_OL = 400 mV	4			mA
	TFLAG (active high, open-drain)	TFLAG pin high	TFLAG sink high < 1 µA	Device is in thermal shutdown
	TFLAG (active high, open-drain)	TFLAG pin low	TFLAG < 0.4 V	Device is not in thermal shutdown
	IFLAG (active high, open-drain)	IFLAG pin high	IFLAG sink high < 1 µA	Device is in current limit
	IFLAG (active high, open-drain)	IFLAG pin low	IFLAG < 0.4 V	Device is not in current limit
SHUTDOWN MODE TIMING
	Enable time		SD pin transitions from low to high		3		ms
	Disable time		SD pin transitions from high to low		2		ms