SBOS153B September   2000  – January 2016 OPA541

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Current Limit
      2. 8.1.2 Heat Sinking
      3. 8.1.3 Safe Operating Area
      4. 8.1.4 Replacing Hybrid Power Amplifiers
    2. 8.2 Typical Applications
      1. 8.2.1 Clamping Output for EMF-Generating Loads
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Supply Requirements
          2. 8.2.1.2.2 Current Limit and SOA (Safe Operating Area)
          3. 8.2.1.2.3 Heat Sinking
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Paralleled Operation, Extended SOA
        1. 8.2.2.1 Design Requirements
      3. 8.2.3 Programmable Voltage Source
        1. 8.2.3.1 Design Requirements
      4. 8.2.4 16-Bit Programmable Voltage Source
        1. 8.2.4.1 Design Requirements
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply voltage, +VS to –VS 80 V
Output current See SOA, Figure 11
Power dissipation, Internal(2) 125 W
Input voltage, differential +VS
Input voltage, common-mode +VS
Temperature, pin solder, 10 s 300 °C
Junction temperature(2) 150 °C
Operating temperature (case) AP –40 85 °C
AM, BM, SM –55 125
AP –25 85
Storage temperature, Tstg AM, BM, SM –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply Voltage (V+ – V–) 10 (±5) 80 (±40) V
Specified temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) OPA541 UNIT
KV (TO-220) LMF (TO-3)
11 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 21.5 — °C/W
RθJC(top) Junction-to-case (top) thermal resistance 17.4 — °C/W
RθJB Junction-to-board thermal resistance 9.2 — °C/W
ψJT Junction-to-top characterization parameter 1.5 — °C/W
ψJB Junction-to-board characterization parameter 9.2 — °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 0.1 3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At TC= 25°C and VS = ±35 VDC, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT OFFSET VOLTAGE
VOS Input offset voltage Specified temperature range
VS = ±10 V to ±VMAX 		OPA541AM/AP ±2 ±10 mV
OPA541BM/SM ±0.1 ±1
vs temperature OPA541AM/AP ±20 ±40 µV/°C
OPA541BM/SM ±15 ±30
vs supply voltage OPA541AM/AP,
OPA541BM/SM		 ±2.5 ±10 µV/V
vs power ±20 ±60 µV/W
IB Input bias current 4 50 pA
IOS Input offset current ±1 ±30 pA
Specified temperature range 5 nA
INPUT CHARACTERISTICS
Common-mode voltage range Specified temperature range ±(|VS| – 6) ±(|VS| – 3) V
Common-mode rejection VCM = (|±VS| – 6 V) 95 113 dB
Input capacitance 5 pF
Input impedance, DC 1 TΩ
GAIN CHARACTERISTICS
Open-loop gain at 10 Hz RL = 6 Ω 90 97 dB
Gain-bandwidth product 1.6 MHz
OUTPUT
Voltage swing IO = 5 A, continuous ±(|VS| – 5.5) ±(|VS| – 4.5) V
IO = 2 A ±(|VS| – 4.5) ±(|VS| – 3.6)
IO = 0.5 A ±(|VS| – 4) ±(|VS| – 3.2)
Peak current 9 10 A
AC PERFORMANCE
Slew rate 6 10 V/µs
Power bandwidth RL = 8 Ω, VO = 20 Vrms 45 55 kHz
Settling time to 0.1% 2-V Step 2 µs
Capacitive load Specified temperature range, G = 1 3.3 nF
Specified temperature range, G > 10 SOA(1)
Phase margin Specified temperature range, RL = 8 Ω 40 °C
±VS Power supply voltage Specified temperature range ±10 ±30 ±35 V
Quiescent current 20 25 mA
TCASE Temperature range AM, BM, AP –25 85 °C
OPA541BM/SM –55 125
(1) SOA is the Safe Operating Area shown in Figure 11.

6.6 Typical Characteristics

At TA = 25°C, VS = ±35 VDC, unless otherwise noted.
OPA541 sbos153_typchar_1.gif
Figure 1. Input Bias Current vs Temperature
OPA541 sbos153_typchar_3.gif
Figure 3. Normalized Quiescent Current vs Total Power Supply Voltage
OPA541 sbos153_typchar_5.gif
Figure 5. Voltage Noise Density vs Frequency
OPA541 sbos153_typchar_7.gif
Figure 7. Current Limit vs Resistance Limit
OPA541 sbos153_typchar_9.gif
Figure 9. Common-Mode Rejection vs Frequency
OPA541 sbos153_typchar_2.gif
Figure 2. Open-Loop Gain and Phase vs Frequency
OPA541 sbos153_typchar_4.gif
Figure 4. Output Voltage Swing vs Output Current
OPA541 sbos153_typchar_6.gif
Figure 6. Total Harmonic Distortion + Noise vs Frequency
OPA541 sbos153_typchar_8.gif
Figure 8. Current Limit vs Resistance Limit vs Temperature
OPA541 sbos153_typchar_10.gif
Figure 10. Dynamic Response
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