SBOS206F January 2001 – October 2023 OPA561
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The OPA561 features an overcurrent status flag (CLS, pin 9) that can be monitored to see if the load exceeds the current limit. The output signal of the overcurrent limit flag is compatible to standard logic. The CLS signal is referenced to V−. A voltage level less than (V−) + 0.8 V indicates normal operation, and a level greater than (V−) + 2 V indicates that the OPA561 is current limited. The flag remains high as long as the output of the OPA561 current limited. At very low signal frequencies (typically < 1 kHz), both the upper (sourcing current) and lower (sinking current) current limits are monitored. At frequencies > 1 kHz, as a result of internal circuit limitations, the flag output signal for the upper current limit becomes delayed and shortened. The flag signal for the lower current limit is unaffected by this behavior. As the signal frequency increases further, only the lower current limit (sinking current) is output on pin 9.