SBOS206F January 2001 – October 2023 OPA561
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The shutdown pin is referenced to the negative supply (V−). Therefore, shutdown operation is slightly different in single-supply and dual-supply applications. In single-supply operation, V− typically equals common ground. Therefore, the shutdown logic signal and the OPA561’s shutdown pin are referenced to the same potential. In this configuration, the logic pin and the OPA561 enable can simply be tied together. Shutdown occurs for voltage levels of < 0.8 V. The OPA561 is enabled at logic levels > 2 V. In dual-supply operation, the logic pin is still referenced to a logic ground. However, the shutdown pin of the OPA561 is still referenced to V−. To shutdown the OPA561, the voltage level of the logic signal needs to be level shifted using an optocoupler, as shown in Figure 6-2.
To disable the output, the E/S pin is pulled LOW, to no greater than 0.8 V above V−. This function can be used to conserve power during idle periods. The typical time required to shut down the output is 50 ns. To return the output to an enabled state, the E/S pin can be pulled to at least 2.0 V above V−. Typically, the output is enabled within 3 μs. Note that pulling the E/S pin HIGH (output enabled) does not disable the internal thermal shutdown.