Designs that require high bandwidth from a large area detector with relatively high transimpedance gain benefit from the low input voltage noise of the OPA810. This input voltage noise is peaked up over frequency by the diode source capacitance, and can (in many cases) become the limiting factor to input sensitivity. The key elements to the design are the expected diode capacitance (C_D) with the reverse bias voltage (V_BIAS) applied, the desired transimpedance gain, R_F, and the GBWP for the OPA810 (70 MHz). Figure 8-12 shows a transimpedance circuit with the parameters as described in Table 8-2. With these three variables set (and including the parasitic input capacitance for the OPA810 and the printed circuit board (PCB) added to C_D), the feedback capacitor value (C_F) can be set to control the frequency response. The Transimpedance Considerations for High-Speed Amplifiers application report discusses using high-speed amplifiers for transimpedance applications. Set the feedback pole according to Equation 9 to achieve a maximally-flat second-order Butterworth frequency response:

Equation 9.

The input capacitance of the amplifier is the sum of the common-mode and differential capacitance (2.0 + 0.5) pF. The parasitic capacitance from the photodiode package and the PCB is approximately 0.3 pF. Using Equation 5 gives a total input capacitance of C_D = 22.8 pF. From Equation 9, set the feedback pole at 1.55 MHz. Setting the pole at 1.55 MHz requires a total feedback capacitance of 1.03 pF.

Equation 10 shows the approximate –3-dB bandwidth of the transimpedance amplifier circuit:

Equation 10.

Equation 10 estimates a closed-loop bandwidth of 2.19 MHz. Figure 8-13 and Figure 8-14 show the loop-gain magnitude and phase plots from the TINA-TI simulations of the transimpedance amplifier circuit of Figure 8-12. The 1/β gain curve has a zero from R_F and C_IN at 70 kHz and a pole from R_F and C_F canceling the 1/β zero at 1.5 MHz, resulting in a 20-dB per decade rate-of-closure at the loop-gain crossover frequency (the frequency where A_OL equals 1/β), providing a stable circuit. A phase margin of 62° is obtained with a closed-loop bandwidth of 3 MHz and a 100-kΩ transimpedance gain.