ZHCSOI9B July   2022  – December 2024 OPA817

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 FET-Input Architecture With Wide Gain-Bandwidth Product
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down (PD) Pin
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, High-Input-Impedance DAQ Front End
    2. 8.2 Typical Applications
      1. 8.2.1 High-Input-Impedance, 200-MHz, Digitizer Front-End Amplifier Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 静电放电警告
    7. 9.7 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DTK|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout Guidelines

Achieving optimized performance with a high-frequency amplifier such as the OPA817 requires careful attention to board layout parasitics and external component types. Recommendations that optimize performance include the following:

  1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability. On the noninverting input, parasitic capacitance can react with the source impedance to cause unintentional bandlimiting. Ground and power metal planes act as one of the plates of a capacitor while the signal trace metal acts as the other separated by PCB dielectric. To reduce this unwanted capacitance, take care to minimize the routing of the feedback network. A plane cutout around and underneath the inverting input pin on all ground and power planes is recommended. Otherwise, ensure that ground and power planes are unbroken elsewhere on the board.
  2. Minimize the distance (less than 0.25-in) from the power-supply pins to high-frequency decoupling capacitors. Use high quality, 100-pF to 0.1-µF, C0G and NPO-type decoupling capacitors with voltage ratings at least three times greater than the amplifiers maximum power supplies to maintain a low-impedance path to the amplifiers power-supply pins across the amplifiers gain bandwidth specification. At the device pins, do not allow the ground and power plane layout to be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Use larger (2.2-µF to 6.8-µF) decoupling capacitors, effective at lower frequency, on the supply pins. Place these capacitors further from the device and share the capacitors among several devices in the same area of the PCB.
  3. Careful selection and placement of external components preserves the high frequency performance of the OPA817. Use low-reactance resistors. Surface-mount resistors work best and allow a tighter overall layout. Never use wirewound type resistors in a high frequency application. The output pin and inverting input pin are the most sensitive to parasitic capacitance; therefore, always position the feedback and series output resistor, if any, as close as possible to the inverting input and the output pin, respectively. Place other network components, such as noninverting input termination resistors, close to the package. Even with a low parasitic capacitance at the noninverting input, high external resistor values can create significant time constants that can degrade performance. When OPA817 is configured as a conventional voltage amplifier, keep the resistor values as low as possible and consistent with the load driving considerations. Decrease the resistor values to keep the resistor noise terms low and minimizes the effect of the parasitic capacitance. However, lower resistor values increase the dynamic power consumption because RF and RG become part of the output load network of the amplifier.
  4. Heat dissipation is important for a high voltage device like the OPA817. For good thermal relief, connect the thermal pad to a heat-spreading plane that is preferably on the same layer as the OPA817, or connected by as many vias as possible if the plane is on a different layer. Have at least one heat-spreading plane on the same layer as the OPA817 that makes direct connection to the thermal pad with wide metal for good thermal conduction when operating at high ambient temperatures. If more than one heat-spreading plane is available, then connect the heat-spreading planes by a number of vias to further improve the thermal conduction.