ZHCSOI9A July   2022  – December 2022 OPA817

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 FET-Input Architecture with Wide Gain-Bandwidth Product
      4. 8.3.4 Device Functional Modes
        1. 8.3.4.1 Power-Down (PD) Pin
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, High-Input Impedance DAQ Front-End
    2. 9.2 Typical Applications
      1. 9.2.1 High Input Impedance, 200 MHz, Digitizer Front-End Amplifier Design
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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7.6 Typical Characteristics: VS = ±5 V

At G = 1 V/V, RF = 0 Ω, RF = 250 Ω for other gains, RL = 100 Ω, input and output referenced to mid-supply, and TA ≅ 25°C (unless otherwise noted).

VOUT = 200 mVPP
Figure 7-1 Noninverting Small-Signal Frequency Response
Figure 7-3 Noninverting Large-Signal Frequency Response
G = －1 V/V
Figure 7-5 Inverting Large-Signal Frequency Response
VOUT = 200 mVPP
Figure 7-7 Noninverting Small-Signal Frequency Response Over Supply
G = －1 V/V
Figure 7-9 Inverting Large-Signal Pulse Response
f = 10 MHz
Figure 7-11 Harmonic Distortion vs Output Voltage
f = 10 MHz VOUT = 2 VPP
Figure 7-13 Harmonic Distortion vs Noninverting Gain
f = 10 MHz VOUT = 2 VPP
Figure 7-15 Harmonic Distortion vs Supply Voltage
Figure 7-17 Current Noise Density vs Frequency
Figure 7-19 Common-Mode and Power-Supply Rejection Ratio vs Frequency
VOUT = 200 mVPP
Figure 7-21 Frequency Response vs Capacitive Load
Figure 7-23 Quiescent Current vs Voltage Supply Over Temperature
40 units, delta from 25°C
Figure 7-25 Input Offset Voltage vs Temperature
40 units, μ = 1.2 μV/°C, σ = 0.5 μV/°C
Figure 7-27 Input Offset Voltage Drift Histogram
40 units
Figure 7-29 Input Bias Current vs Temperature
Figure 7-31 Input Bias Current vs Common-Mode Voltage Over Temperature
G = －1 V/V
Figure 7-33 Inverting Output Overdrive Recovery
Figure 7-35 Open-Loop and Closed-Loop Output Impedance vs Frequency
VOUT = 200 mVPP
Figure 7-2 Inverting Small-Signal Frequency Response
Figure 7-4 Gain Flatness vs Frequency
VOUT = 2 VPP
Figure 7-6 Large-Signal Frequency Response Over Gain
Figure 7-8 Noninverting Large-Signal Pulse Response
f = 10 MHz VOUT = 2 VPP
Figure 7-10 Harmonic Distortion vs Load Resistance
VOUT = 2 VPP
Figure 7-12 Harmonic Distortion vs Frequency
f = 10 MHz VOUT = 2 VPP
Figure 7-14 Harmonic Distortion vs Inverting Gain
Figure 7-16 Voltage Noise Density vs Frequency
Figure 7-18 Intermodulation Distortion vs Load Power
Figure 7-20 Open-Loop Gain Magnitude and Phase vs Frequency
Figure 7-22 Recommended Isolation Resistor vs Capacitive Load
Figure 7-24 Output Voltage vs Output Current Over Temperature
4000 units, μ = 40 μV, σ = 60 μV
Figure 7-26 Input Offset Voltage Histogram
Figure 7-28 Input Offset Voltage vs Common-Mode Voltage Over Temperature
40 units
Figure 7-30 Input Offset Current vs Temperature
G = 2 V/V
Figure 7-32 Noninverting Output Overdrive Recovery
Figure 7-34 Turn-On and Turn-Off Waveform
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