ZHCSOI9B July   2022  – December 2024 OPA817

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 FET-Input Architecture With Wide Gain-Bandwidth Product
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down (PD) Pin
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, High-Input-Impedance DAQ Front End
    2. 8.2 Typical Applications
      1. 8.2.1 High-Input-Impedance, 200-MHz, Digitizer Front-End Amplifier Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 接收文档更新通知
    4. 9.4 支持资源
    5. 9.5 Trademarks
    6. 9.6 静电放电警告
    7. 9.7 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DTK|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2.1.1 Design Requirements

Table 8-1 lists the design requirements for a high-input-impedance, 200-MHz, digitizer front-end amplifier.

Table 8-1 Design Requirements
SPECIFICATION VALUE
Input impedance 1 MΩ / 50Ω
Input range (1 MΩ / 50 Ω) 20 VPP / 2 VPP
Offset drift 3.5 µV/°C maximum
Noise at highest resolution (50 Ω Input) 80 µVRMS
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