米6体育平台手机版

ZHCSGM4D August 2017 – September 2024 OPA838

PRODMIX

封装选项

机械数据 (封装 | 引脚)

DCK|5
- MPDS025J
DCK|6
- MPDS114E
DXB|8
DBV|6
- MPDS026Q

散热焊盘机械数据 (封装 | 引脚)

订购信息

6.9 Typical Characteristics: Over Supply Range

at PD = V_S+ and T_A = 25°C (unless otherwise noted)

No load, simulation

Figure 6-37 Open-Loop Gain and Phase

Figure 6-39 Input Spot Noise Density

Simulated results

Figure 6-41 PSRR and CMRR

OPA838 Input
Offset Voltage Distribution

600 units at each supply voltage

Figure 6-43 Input Offset Voltage Distribution

OPA838 Input
Offset Voltage vs Temperature

51 units at 5-V and 3-V supply

Figure 6-45 Input Offset Voltage vs Temperature

OPA838 Input
Offset Voltage Drift Distribution

51 units at each supply

Figure 6-47 Input Offset Voltage Drift Distribution

See Figure 7-6 and Table 8-1
small signal, targeting 30° phase margin

Figure 6-49 Output Resistor vs C_LOAD

Figure 6-51 Turn-On Time to Sinusoidal Input

OPA838 Gain
of 6-V/V Turn-On Time to Final DC Value at Midscale

Single-supply, DC input to produce midscale output (simulation)

Figure 6-53 Gain of 6-V/V Turn-On Time to Final DC Value at Midscale

OPA838 Output Voltage Swing vs Load Resistor

Figure 6-55 Output Voltage Swing vs Load Resistor

Figure 6-57 Quiescent Current vs Temperature

OPA838 Input
Offset Voltage vs Input Common-Mode Voltage

5 units, 3-V and 5-V supplies

Figure 6-59 Input Offset Voltage vs Input Common-Mode Voltage

See Figure 8-1 and Table 8-1 (simulation)

Figure 6-38 Closed-Loop Output Impedance

Input referred

Figure 6-40 Low-Frequency Voltage Noise

OPA838 Disabled Isolation Noninverting Input to Output

Measured, A_V = 6 V/V, 100-Ω load

Figure 6-42 Disabled Isolation Noninverting Input to Output

OPA838 Input
Offset Current Distribution

600 units at each supply voltage

Figure 6-44 Input Offset Current Distribution

OPA838 Input
Offset Current vs Temperature

51 units at 5-V and 3-V supply

Figure 6-46 Input Offset Current vs Temperature

OPA838 Input
Offset Current Drift Distribution

51 units at each supply

Figure 6-48 Input Offset Current Drift Distribution

OPA838 Small-Signal Response Shapes vs CLOAD With Recommended
ROUT

See Figure 7-6 and Table 8-1
2-kΩ parallel load to C _LOAD

Figure 6-50 Small-Signal Response Shapes vs C_LOAD With Recommended R_OUT

OPA838 Turn-Off Time to Sinusoidal Input

Figure 6-52 Turn-Off Time to Sinusoidal Input

OPA838 Gain
of 10-V/V Turn-On Time to Final DC Value at Midscale

Single-supply, DC input to produce midscale output (simulation)

Figure 6-54 Gain of 10-V/V Turn-On Time to Final DC Value at Midscale

OPA838 Output Saturation Voltage vs Load Current

Figure 6-56 Output Saturation Voltage vs Load Current

OPA838 Supply Current vs Power-Down Voltage: Turn On
Higher Than Turn Off

Figure 6-58 Supply Current vs Power-Down Voltage:
Turn On Higher Than Turn Off

OPA838 Input
Bias and Offset Current vs VICM

Measured single device

Figure 6-60 Input Bias and Offset Current vs V_ICM