ZHCSGM4D August 2017 – September 2024 OPA838
PRODMIX
The common-mode loop instability without the RG center tap is not often apparent in the closed-loop differential simulations. The common-mode loop instability without the RG center tap can often be detected in a common-mode output-noise simulation as Figure 8-5 shows. Grounding the inputs Figure 8-4 and running an output-noise simulation for the common-mode tap point in Figure 8-3 shows a peaking in the noise at high frequency. This peaking indicates low-phase margin for the common-mode loop. Figure 8-5 shows this peaking in the lowest noise curve, with two options for improving phase margin. The first option used in Figure 8-4 is a capacitor to ground set to increase the common-mode noise gain only at higher frequencies. This increase can be seen by the peaking in the common-mode noise of Figure 8-5. Another alternative is to provide a dc voltage reference on the RG center tap. This method raises the common-mode noise gain from dc and beyond. Neither of these latter two options show any evidence of low phase-margin peaking. These two options do increase the output common-mode noise significantly at lower frequencies. Typically, an increase in output common-mode noise is more acceptable than low-phase margin because the next stage (FDA, ADC, differential to single stage) rejects common-mode noise.
Using the 10-nF center tap capacitor, Figure 8-6 shows the differential I/O small-signal response showing the expected 300 MHz / 41 ≈ 7.3 MHz closed-loop bandwidth. The capacitor to ground between the RG elements does not impact the differential frequency response.