10.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier such as the OPA857 requires careful attention to board layout parasitics and external component types. Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any ac ground for all signal I/O pins. Parasitic capacitance on the inverting input pin can cause instability. To reduce unwanted capacitance, open a window around the signal I/O pins in all ground and power planes around those pins. Otherwise, make sure that ground and power planes are unbroken elsewhere on the board.
2. Minimize the distance (< 0.25") from the power-supply pins to high-frequency 0.1-µF decoupling capacitors, as shown in Figure 48. At the device pins, make sure that the ground and power-plane layout are not in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and decoupling capacitors. Always decouple the power-supply connections with these capacitors. An optional supply decoupling capacitor (0.1 µF) across the two power supplies (for bipolar operation) improves second-harmonic distortion performance. Use larger (2.2 µF to 6.8 µF) decoupling capacitors, effective at lower frequencies, on the main supply pins. These capacitors can be placed somewhat farther from the device and can be shared among several devices in the same area of the PC board.
3. Careful selection and placement of external components preserves the high-frequency performance of the OPA857. Use very low reactance type resistors. Surface-mount resistors function best and allow a tighter overall layout. Metal-film or carbon composition, axially-leaded resistors also provide good high-frequency performance. Again, keep the leads and PC board traces as short as possible. Never use wirewound type resistors in a high-frequency application.
4. Connections to other wideband devices on the board can be made with short, direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Use relatively wide traces (50 mils to 100 mils), preferably with ground and power planes opened up around them.
5. Do not socket a high-speed part such as the OPA857. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network that makes achieving a smooth, stable frequency response almost impossible. Best results are obtained by soldering the OPA857 onto the board.

10.2 Layout Example

Figure 48. Layout Example