at
TA = 25°C, VS = 16V, VGRD = VCM =
VS / 2, RL = 10kΩ connected to VS / 2, and
CL = 100pF (unless otherwise noted)
![OPA928 Input Bias Current Production Distribution OPA928 Input Bias Current Production Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-VW9J-BL3D-X1N428LR3SJG-low.svg)
VS = 4.5V, TA = 85°C,
IBN |
Figure 5-1 Input Bias Current Production Distribution![OPA928 Input Bias Current Production
Distribution OPA928 Input Bias Current Production
Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-QC7R-8T1X-SP3GVX676MQC-low.svg)
VS = 16V, TA = 85°C,
IBN, 2126 units |
Figure 5-3 Input Bias Current Production
Distribution![OPA928 Input Bias Current Production Distribution OPA928 Input Bias Current Production Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-JLXC-XSSN-QDKVFRHLCS9P-low.svg)
VS = 36V, TA = 85°C,
IBN, 2126 units |
Figure 5-5 Input Bias Current Production Distribution![OPA928 Input Bias Offset Current Production
Distribution OPA928 Input Bias Offset Current Production
Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-1KHK-0RFT-DRMB48NTP1JT-low.svg)
VS = 16V, TA = 85°C, 2126
units |
Figure 5-7 Input Bias Offset Current Production
Distribution
Figure 5-9 Offset Voltage Production Distribution
Figure 5-11 Offset Voltage Production
Distribution![OPA928 Offset Voltage Drift
Distribution OPA928 Offset Voltage Drift
Distribution](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-0P5W-Q7R7-5Q2CNS0CJCSR-low.svg)
VS = 16V, TA = –40°C to
+125°C, 34 units |
Figure 5-13 Offset Voltage Drift
Distribution![OPA928 Offset Voltage vs
Temperature OPA928 Offset Voltage vs
Temperature](/ods/images/ZHCSNI6A/GUID-20240426-SS0I-7HZW-6TRP-GNSCWSHDQGJT-low.svg)
VS = 4.5V, 5 typical units |
Figure 5-15 Offset Voltage vs
Temperature![OPA928 Offset Voltage vs Temperature OPA928 Offset Voltage vs Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-JQBQ-DH0J-S1SRGXFW7DN1-low.svg)
VS = 36V, 5 typical units |
Figure 5-17 Offset Voltage vs Temperature![OPA928 Offset Voltage vs Common-Mode
Voltage in Transition Region OPA928 Offset Voltage vs Common-Mode
Voltage in Transition Region](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-DKT0-GGTG-JSQGRVPTMG3L-low.svg)
VS = 16V, 5 typical units |
Figure 5-19 Offset Voltage vs Common-Mode
Voltage in Transition Region
Figure 5-21 Open-Loop Gain and Phase vs
Frequency
Figure 5-23 Input
Bias Current vs Common-Mode Voltage
Figure 5-25 Input
Bias Current vs Common-Mode Voltage
Figure 5-27 Input
Bias Current vs Common-Mode Voltage
Figure 5-29 Input Bias Current vs
Temperature
Figure 5-31 Input
Bias Current vs Temperature
Figure 5-33 Output Voltage Swing vs Output
Current
Figure 5-35 Output Voltage Swing vs Output Current
Figure 5-37 Output Voltage Swing vs Output Current
Figure 5-39 0.1Hz to 10Hz Noise
Figure 5-41 Input Current Noise
Spectral Density
vs Frequency
Figure 5-43 THD+N vs Frequency
Figure 5-45 THD+N vs Output
Amplitude
Figure 5-47 THD+N vs Frequency
Figure 5-49 THD+N vs Output Amplitude
Figure 5-51 Quiescent Current vs
Temperature
Figure 5-53 Open-Loop Output Impedance vs
Frequency
Figure 5-55 Small-Signal Overshoot vs
Capacitive Load
Figure 5-57 Positive Overload
Recovery![OPA928 Small-Signal Step
Response OPA928 Small-Signal Step
Response](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-77JD-4QPD-ZHLB8JDMJPG5-low.svg)
G =
1, CL = 10pF, 10mV step |
Figure 5-59 Small-Signal Step
Response![OPA928 Large-Signal Step
Response OPA928 Large-Signal Step
Response](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-WDVH-ZDDD-VZJK5NMVTPSJ-low.svg)
G =
1, CL = 10pF, 10mV step |
Figure 5-61 Large-Signal Step
Response![OPA928 Settling Time OPA928 Settling Time](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-KNWD-X274-J1WDRL1XBTKZ-low.svg)
Gain
= 1, CL = 10pF, 2V step applied at t =
0µs |
Figure 5-63 Settling Time
Figure 5-65 Guard Buffer Offset Distribution
Figure 5-67 Guard Buffer Offset Distribution
Figure 5-69 Guard
Buffer Offset Drift Distribution![OPA928 Guard
Buffer Offset Voltage vs Temperature OPA928 Guard
Buffer Offset Voltage vs Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-DGB3-1KSW-XLDXCB49WDX1-low.svg)
VS = 4.5V, 5 typical units |
Figure 5-71 Guard
Buffer Offset Voltage vs Temperature![OPA928 Guard
Buffer Offset Voltage vs Temperature OPA928 Guard
Buffer Offset Voltage vs Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-XKGF-TVHM-SPNSB8TFQWTT-low.svg)
VS = 16V, 5 typical units |
Figure 5-73 Guard
Buffer Offset Voltage vs Temperature![OPA928 Input Bias Current Production Distribution OPA928 Input Bias Current Production Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-8XWQ-F1ZP-P7L16X5TM39M-low.svg)
VS = 4.5V, TA = 85°C,
IBP |
Figure 5-2 Input Bias Current Production Distribution![OPA928 Input Bias Current Production Distribution OPA928 Input Bias Current Production Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-8WH6-4KRF-SFJM8XFWZCXN-low.svg)
VS = 16V, TA = 85°C,
IBP, 2126 units |
Figure 5-4 Input Bias Current Production Distribution![OPA928 Input Bias Current Production Distribution OPA928 Input Bias Current Production Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-Q9PN-TB02-8GL4QHKJW4BR-low.svg)
VS = 36V, TA = 85°C,
IBP, 2126 units |
Figure 5-6 Input Bias Current Production Distribution![OPA928 Input Bias Offset Current Production
Distribution OPA928 Input Bias Offset Current Production
Distribution](/ods/images/ZHCSNI6A/GUID-20240325-SS0I-ZGDM-J543-H9PH1VBTGV8L-low.svg)
VS = 36V, TA = 85°C, 2126
units |
Figure 5-8 Input Bias Offset Current Production
Distribution
Figure 5-10 Offset Voltage Production
Distribution![OPA928 Offset Voltage Drift
Distribution OPA928 Offset Voltage Drift
Distribution](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-DDMG-ZDZG-N8HMRFJJTK6P-low.svg)
VS = 4.5V, TA = –40°C to
+125°C, 34 units |
Figure 5-12 Offset Voltage Drift
Distribution![OPA928 Offset Voltage Drift Distribution OPA928 Offset Voltage Drift Distribution](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-CPJK-34T7-NZB0T9QV1SS0-low.svg)
VS = 36V, TA = –40°C to
+125°C, 34 units |
Figure 5-14 Offset Voltage Drift Distribution![OPA928 Offset Voltage vs
Temperature OPA928 Offset Voltage vs
Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-LXPZ-FNWL-ZWPBLPFF1DKH-low.svg)
VS = 16V, 5 typical units |
Figure 5-16 Offset Voltage vs
Temperature![OPA928 Offset Voltage vs Common-Mode
Voltage OPA928 Offset Voltage vs Common-Mode
Voltage](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-V5K3-FNVH-HP3JXJFG0G7M-low.svg)
VS = 4.5V, 5 typical units |
Figure 5-18 Offset Voltage vs Common-Mode
Voltage![OPA928 Offset Voltage vs Common-Mode Voltage in Transition Region OPA928 Offset Voltage vs Common-Mode Voltage in Transition Region](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-G75W-MHSS-496ZXT8XTT51-low.svg)
VS = 36V, 5 typical units |
Figure 5-20 Offset Voltage vs Common-Mode Voltage in Transition Region
Figure 5-22 Closed-Loop Gain vs
Frequency
Figure 5-24 Input
Bias Current vs Common-Mode Voltage
Figure 5-26 Input Bias Current vs
Common-Mode Voltage
Figure 5-28 Input
Bias Current vs Common-Mode Voltage
Figure 5-30 Input
Bias Current vs Temperature
Figure 5-32 Output Voltage Swing vs Output
Current
Figure 5-34 Output Voltage Swing vs Output Current
Figure 5-36 Output Voltage Swing vs Output Current
Figure 5-38 CMRR and PSRR vs
Frequency
Figure 5-40 Input Voltage Noise Spectral
Density
vs Frequency
Figure 5-42 THD+N
vs Frequency
Figure 5-44 THD+N vs Output Amplitude
Figure 5-46 THD+N vs Frequency
Figure 5-48 THD+N vs Output Amplitude
Figure 5-50 Quiescent Current vs Supply
Voltage
Figure 5-52 Open-Loop Gain vs
Temperature
Figure 5-54 Small-Signal Overshoot vs
Capacitive Load
Figure 5-56 No Phase Reversal
Figure 5-58 Negative Overload Recovery![OPA928 Small-Signal Step Response OPA928 Small-Signal Step Response](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-MH2X-Z81F-5BCC5PDW0BVR-low.svg)
G =
−1, CL = 10pF, 10mV step |
Figure 5-60 Small-Signal Step Response![OPA928 Large-Signal Step Response OPA928 Large-Signal Step Response](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-HLHK-GP6S-LPN9JP20S42R-low.svg)
G =
−1, CL = 10pF, 10mV step |
Figure 5-62 Large-Signal Step Response![OPA928 Settling Time OPA928 Settling Time](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-D840-NS96-VTK2VN0HXKTF-low.svg)
Gain
= 1, CL = 10pF, 10V step applied at t =
0µs |
Figure 5-64 Settling Time
Figure 5-66 Guard Buffer Offset Distribution
Figure 5-68 Guard
Buffer Offset Drift Distribution
Figure 5-70 Guard
Buffer Offset Drift Distribution![OPA928 Guard
Buffer Offset Voltage vs Temperature OPA928 Guard
Buffer Offset Voltage vs Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-XKGF-TVHM-SPNSB8TFQWTT-low.svg)
VS = 4.5V, 5 typical units |
Figure 5-72 Guard
Buffer Offset Voltage vs Temperature![OPA928 Guard
Buffer Offset Voltage vs Temperature OPA928 Guard
Buffer Offset Voltage vs Temperature](/ods/images/ZHCSNI6A/GUID-20240315-SS0I-Q1QZ-JJQ9-RLSHVLP0P6V9-low.svg)
VS = 36V, 5 typical units |
Figure 5-74 Guard
Buffer Offset Voltage vs Temperature