ZHCSQY6E August   2022  – July 2024 OPA2992-Q1 , OPA4992-Q1 , OPA992-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Protection Circuitry
      2. 6.3.2 EMI Rejection
      3. 6.3.3 Thermal Protection
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Common-Mode Voltage Range
      6. 6.3.6 Phase Reversal Protection
      7. 6.3.7 Electrical Overstress
      8. 6.3.8 Overload Recovery
      9. 6.3.9 Typical Specifications and Distributions
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Low-Side Current Measurement
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI (Free Software Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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订购信息

Pin Configuration and Functions

OPA992-Q1 OPA2992-Q1 OPA4992-Q1 OPA992-Q1 DBV Package,5-Pin
                            SOT-23(Top View)Figure 4-1 OPA992-Q1 DBV Package,
5-Pin SOT-23
(Top View)
OPA992-Q1 OPA2992-Q1 OPA4992-Q1 OPA992-Q1 DCK Package,5-Pin
                            SC70(Top
                            View)Figure 4-2 OPA992-Q1 DCK Package,
5-Pin SC70
(Top View)
Table 4-1 Pin Functions: OPA992-Q1
PIN TYPE(1) DESCRIPTION
NAME SOT-23 SC70
IN+ 3 1 I Noninverting input
IN– 4 3 I Inverting input
OUT 1 4 O Output
V+ 5 5 Positive (highest) power supply
V– 2 2 Negative (lowest) power supply
I = input, O = output
OPA992-Q1 OPA2992-Q1 OPA4992-Q1 OPA2992-Q1 D, PW, and DGK
                            Package,8-Pin SOIC, TSSOP, and VSSOP(Top
                        View)Figure 4-3 OPA2992-Q1 D, PW, and DGK Package,
8-Pin SOIC, TSSOP, and VSSOP
(Top View)
Table 4-2 Pin Functions: OPA2992-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
IN1+ 3 I Noninverting input, channel 1
IN1– 2 I Inverting input, channel 1
IN2+ 5 I Noninverting input, channel 2
IN2– 6 I Inverting input, channel 2
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
V+ 8 Positive (highest) power supply
V– 4 Negative (lowest) power supply
I = input, O = output
OPA992-Q1 OPA2992-Q1 OPA4992-Q1 OPA4992-Q1 D and PW
                                Package,14-Pin SOIC and
                            TSSOP(Top View)Figure 4-4 OPA4992-Q1 D and PW Package,
14-Pin SOIC and TSSOP
(Top View)
Table 4-3 Pin Functions: OPA4992-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
IN1+ 3 I Noninverting input, channel 1
IN1– 2 I Inverting input, channel 1
IN2+ 5 I Noninverting input, channel 2
IN2– 6 I Inverting input, channel 2
IN3+ 10 I Noninverting input, channel 3
IN3– 9 I Inverting input, channel 3
IN4+ 12 I Noninverting input, channel 4
IN4– 13 I Inverting input, channel 4
OUT1 1 O Output, channel 1
OUT2 7 O Output, channel 2
OUT3 8 O Output, channel 3
OUT4 14 O Output, channel 4
V+ 4 Positive (highest) power supply
V– 11 Negative (lowest) power supply
I = input, O = output