ZHCSG67A March 2017 – December 2018 OPT3001-Q1
PRODUCTION DATA.
When the bus is idle, both the SDA and SCL lines are pulled high by the pull-up resistors or active pull-up devices. The master generates a start condition followed by a valid serial byte containing the high-speed (HS) master code 0000 1XXXb. This transmission is made in either standard mode or fast mode (up to 400 kHz). The OPT3001-Q1 device does not acknowledge the HS master code but does recognize the code and switches its internal filters to support a 2.6-MHz operation.
The master then generates a repeated start condition (a repeated start condition has the same timing as the start condition). After this repeated start condition, the protocol is the same as F/S mode, except that transmission speeds up to 2.6 MHz are allowed. Instead of using a stop condition, use repeated start conditions to secure the bus in HS mode. A stop condition ends the HS mode and switches all internal filters of the OPT3001-Q1 device to support the F/S mode.