To communicate with the OPT4001, the controller must first initiate an I²C start command. Then, the controller must address target devices via a target address byte. The target address byte consists of a seven bit address and a direction bit that indicates whether the action is to be a read or write operation.

For the SOT 5X3 variant, four I²C addresses are possible by connecting the ADDR pin to one of four pins: GND, VDD, SDA, or SCL. Table below summarizes the possible addresses with the corresponding ADDR pin configuration. The state of the ADDR pin is sampled on every bus communication and must be driven or connected to the desired level before any activity on the interface occurs.

In case of the PicoStar™ variant there is no target address selection capability and the device address is hard coded to 1000101b (0x45).