ZHCSNI8J September   2006  – March 2021 PCA9534A

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Description (Continued)
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Resistance Characteristics
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Functional Block Diagram
    2. 9.2 Device Functional Modes
      1. 9.2.1 Power-On Reset
      2. 9.2.2 I/O Port
      3. 9.2.3 Interrupt Output ( INT)
        1. 9.2.3.1 Interrupt Errata
          1. 9.2.3.1.1 Description
          2. 9.2.3.1.2 System Impact
          3. 9.2.3.1.3 System Workaround
    3. 9.3 Programming
      1. 9.3.1 I2C Interface
      2. 9.3.2 Register Map
        1. 9.3.2.1 Device Address
        2. 9.3.2.2 Control Register And Command Byte
        3. 9.3.2.3 Register Descriptions
        4. 9.3.2.4 Bus Transactions
          1. 9.3.2.4.1 Writes
          2. 9.3.2.4.2 Reads
  10. 10Application Information Disclaimer
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Design Requirements
          1. 10.1.1.1.1 Minimizing ICC When The I/O Controls Leds
  11. 11Power Supply Recommendations
    1. 11.1 Power-On Reset Requirements
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 静电放电警告
    3. 12.3 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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9.2.3.1.1 Description

The INT will be improperly de-asserted if the following two conditions occur:

  1. The last I2C command byte (register pointer) written to the device was 00h.
    Note:

    This generally means the last operation with the device was a Read of the input register. However, the command byte may have been written with 00h without ever going on to read the input register. After reading from the device, if no other command byte written, it will remain 00h.

  2. Any other slave device on the I2C bus acknowledges an address byte with the R/W bit set high
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