ZHCSNJ0G September   2006  – March 2021 PCA9538

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 RESET Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
      1. 7.2.1 RESET Input
        1. 7.2.1.1 RESET Errata
          1.        System Impact
          2.        System Workaround
      2. 7.2.2 Power-On Reset
      3. 7.2.3 I/O Port
      4. 7.2.4 Interrupt Output ( INT)
        1. 7.2.4.1 Interrupt Errata
          1.        System Impact
          2.        System Workaround
    3. 7.3 Programming
      1. 7.3.1 I2C Interface
    4. 7.4 Register Maps
      1. 7.4.1 Device Address
      2. 7.4.2 Control Register And Command Byte
      3. 7.4.3 Register Descriptions
      4. 7.4.4 Bus Transactions
        1. 7.4.4.1 Writes
        2. 7.4.4.2 Reads
  8. 8 Application Information Disclaimer
    1. 8.1 Application Information Disclaimer
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Minimizing ICC When I/Os Control Leds
  9. 9 Power Supply Recommendations
    1. 9.1 Power-On Reset Requirements
  10. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  11. 11Mechanical, Packaging, and Orderable Information

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7.2.4.1 Interrupt Errata

The INT will be improperly de-asserted if the following two conditions occur:

  1. The last I²C command byte (register pointer) written to the device was 00h.
    Note:

    This generally means the last operation with the device was a Read of the input register. However, the command byte may have been written with 00h without ever going on to read the input register. After reading from the device, if no other command byte written, it remains 00h.

  2. Any other slave device on the I²C bus acknowledges an address byte with the R/W bit set high
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