ZHCSNJ1H August   2005  – March 2021 PCA9539

PRODUCTION DATA  

  1. 1 特性
  2. 2 说明
  3. 3 Revision History
  4. 4 Description (Continued)
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Resistance Characteristics
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 RESET Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Device Functional Modes
      1. 8.2.1 RESET Input
        1. 8.2.1.1 RESET Errata
          1. 8.2.1.1.1 System Impact
          2. 8.2.1.1.2 System Workaround
      2. 8.2.2 Power-On Reset
      3. 8.2.3 I/O Port
      4. 8.2.4 Interrupt ( INT) Output
        1. 8.2.4.1 Interrupt Errata
          1. 8.2.4.1.1 System Impact
          2. 8.2.4.1.2 System Workaround
    3. 8.3 Programming
      1. 8.3.1 I2C Interface
      2. 8.3.2 Register Map
        1. 8.3.2.1 Device Address
        2. 8.3.2.2 Control Register And Command Byte
        3. 8.3.2.3 Register Descriptions
        4. 8.3.2.4 Bus Transactions
          1. 8.3.2.4.1 Writes
          2. 8.3.2.4.2 Reads
  9. 9 Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Detailed Design Procedure
        1. 9.2.1.1 Minimizing ICC When I/O Is Used To Control Led
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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6.6 I2C Interface Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1)
MINMAXUNIT
fsclI2C clock frequency0400kHz
tschI2C clock high time0.6μs
tsclI2C clock low time1.3μs
tspI2C spike time50ns
tsdsI2C serial-data setup time100ns
tsdhI2C serial-data hold time0ns
ticrI2C input rise time20 + 0.1Cb (1)300ns
ticfI2C input fall time20 + 0.1Cb (1)300ns
tocfI2C output fall time10-pF to 400-pF bus20 + 0.1Cb (1)300ns
tbufI2C bus free time between Stop and Start1.3μs
tstsI2C Start or repeated Start condition setup0.6μs
tsthI2C Start or repeated Start condition hold0.6μs
tspsI2C Stop condition setup0.6μs
tvd(data)Valid-data timeSCL low to SDA output valid50ns
tvd(ack)Valid-data time of ACK conditionACK signal from SCL low to SDA (out) low0.10.9μs
CbI2C bus capacitive load400pF
(1) Cb = total capacitance of one bus line in pF
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