ZHCSK60G October 2005 – March 2021 PCA9544A
PRODUCTION DATA
Only one SCn/SDn downstream pair, or channel, can be selected by the contents of the control register (see Table 8-1). This register is written after the PCA9544A has been addressed. The three LSBs of the control byte are used to determine which channel is to be selected. When a channel is selected, the channel becomes active after a stop condition has been placed on the I2C bus. This ensures that all SCn/SDn lines are in a high state when the channel is made active, so that no false conditions are generated at the time of connection. A stop condition always must occur right after the acknowledge cycle.
| INT3 | INT2 | INT1 | INT0 | D3 | B2 | B1 | B0 | COMMAND |
|---|---|---|---|---|---|---|---|---|
| X | X | X | X | X | 0 | X | X | No channel selected |
| X | X | X | X | X | 1 | 0 | 0 | Channel 0 enabled |
| X | X | X | X | X | 1 | 0 | 1 | Channel 1 enabled |
| X | X | X | X | X | 1 | 1 | 0 | Channel 2 enabled |
| X | X | X | X | X | 1 | 1 | 1 | Channel 3 enabled |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | No channel selected, power-up default state |