ZHCSJK4G
June 2009 – March 2021
PCA9548A
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Interface Timing Requirements
6.7
Reset Timing Requirements
6.8
Switching Characteristics
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
RESET Input
8.4.1.1
RESET Errata
8.4.1.1.1
System Impact
8.4.1.1.2
System Workaround
8.4.2
Power-On Reset
8.5
Programming
8.5.1
I2C Interface
8.6
Register Maps
8.6.1
Device Address
8.6.2
Control Register
8.6.3
Bus Transactions
8.6.3.1
Writes
8.6.3.2
Reads
9
Application Information Disclaimer
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-On Reset Requirements
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
DGV|24
MPDS006C
PW|24
MPDS363A
RGE|24
MPQF124G
DW|24
MPDS174A
DB|24
MPDS509
散热焊盘机械数据 (封装 | 引脚)
RGE|24
QFND024AD
订购信息
zhcsjk4g_oa
zhcsjk4g_pm
6.9
Typical Characteristics
Standard-mode (f
SCL
= 100 kHz, t
r
= 1 µs)
Fast-mode (f
SCL
= 400 kHz, t
r
= 300 ns)
Figure 6-1
Maximum Pull-Up Resistance (R
p(max)
) vs Bus Capacitance (C
b
)
V
OL
= 0.2*V
DPUX
, I
OL
= 2 mA when V
DPUX
≤ 2 V
V
OL
= 0.4 V, I
OL
= 3 mA when V
DPUX
> 2 V
Figure 6-2
Minimum Pull-Up Resistance (R
p(min)
) vs Pull-Up Reference Voltage (V
DPUX
)
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