ZHCSHU7J August   2005  – March 2021 PCA9555

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Features
      1. 8.3.1 Power-On Reset (POR)
      2. 8.3.2 I/O Port
    4. 8.4 Device Functional Modes
      1. 8.4.1 Interrupt ( INT) Output
        1. 8.4.1.1 Interrupt Errata
          1. 8.4.1.1.1 INT Description
          2. 8.4.1.1.2 System Impact
          3. 8.4.1.1.3 System Workaround
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 Register Map
        1. 8.5.2.1 Device Address
        2. 8.5.2.2 Control Register And Command Byte
        3. 8.5.2.3 Register Descriptions
        4. 8.5.2.4 Bus Transactions
          1. 8.5.2.4.1 Writes
          2. 8.5.2.4.2 Reads
  9. Application Information Disclaimer
    1. 9.1 Application Information
      1. 9.1.1 Typical Application
        1. 9.1.1.1 Design Requirements
        2. 9.1.1.2 Design Requirements
          1. 9.1.1.2.1 Minimizing ICC When I/O Is Used To Control Led
        3. 9.1.1.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-On Reset Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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Overview

The system master can reset the PCA9555 in the event of a timeout or other improper operation by utilizing the power-on reset feature, which puts the registers in their default state and initializes the I2C/SMBus state machine.

The PCA9555 open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9555 can remain a simple slave device.

The device outputs (latched) have high-current drive capability for directly driving LEDs.

Although pin-to-pin and I2C-address is compatible with the PCF8575, software changes are required due to the enhancements.

The PCA9555 is identical to the PCA9535, except for the inclusion of the internal I/O pullup resistor, which pulls the I/O to a default high when configured as an input and undriven.

Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight devices to share the same I2C bus or SMBus. The fixed I2C address of the PCA9555 is the same as the PCF8575, PCF8575C, and PCF8574, allowing up to eight of these devices in any combination to share the same I2C bus or SMBus.