ZHCSX36K July   2001  – September 2024 PCF8574

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 I2C Interface
      2. 7.3.2 Interface Definition
      3. 7.3.3 Address Reference
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Minimizing ICC When I/Os Control LEDs
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Glossary
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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订购信息

Pin Configuration and Functions

PCF8574 RGT Package, 16 Pins (Top
                        View)Figure 4-1 RGT Package, 16 Pins (Top View)
PCF8574 DGV or PW Package, 20 Pins
                        (Top View)Figure 4-3 DGV or PW Package, 20 Pins (Top View)
PCF8574 RGY Package, 20 Pins (Top
                        View)Figure 4-2 RGY Package, 20 Pins (Top View)
PCF8574 DW or N Package, 20 Pins,
                        Top ViewFigure 4-4 DW or N Package, 20 Pins, Top View
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME RGT RGY DGV or PW DW or N
A [0..2] 2, 3, 4 6, 7, 9 6, 7, 9 1, 2, 3 I Address inputs 0 through 2. Connect directly to VCC or ground. Pullup resistors are not needed.
GND 9 15 15 8 Ground
INT 14 1 1 13 O Interrupt output. Connect to VCC through a pullup resistor.
NC - 3, 8, 13, 18 3, 8, 13, 18 - Do not connect
P[0..7] 5, 6, 7, 8, 10, 11, 12, 13 10, 11, 12, 14, 16, 17, 19, 20 10, 11, 12, 14, 16, 17, 19, 20 4, 5, 6, 7, 9, 10, 11, 12 I/O P-port input/output. Push-pull design structure.
SCL 15 2 2 14 I Serial clock line. Connect to VCC through a pullup resistor
SDA 16 4 4 15 I/O Serial data line. Connect to VCC through a pullup resistor.
VCC 1 5 5 16 Voltage supply