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7.5 Electrical Characteristics: PGA and ADC AC Performance

all specifications at T_A = 25°C, AVDD = 3.3 V, DVDD = 3.3 V, IOVDD = 3.3 V, master mode, single-speed mode, f_S = 48 kHz, system clock = 256 × f_S, and 24-bit data (unless otherwise noted)

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
PRIMARY PGA AND ADC
	Input channel signal-to-noise ratio, differential input	0-dB PGA gain, –60-dB input signal, master mode at Diff input	PCM1860 PCM1862 PCM1864	97	103		dB
			PCM1861 PCM1863 PCM1865	97	110		dB
		32-dB PGA gain⁽¹⁾, –86-dB input signal, master mode at Diff input		85	90		dB
	Input channel THD+N, differential input	0-dB PGA gain, –1-dB input signal, master mode at Diff input		–85	–93		dB
	Input channel THD+N, differential input	32-dB PGA gain, –33-dB input signal, master mode at Diff input		–76	–84		dB
	L channel to R channel separation line input	0-dB PGA gain, –1-dB input signal, master mode			–105		dB
	L channel to R channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode			–105		dB
	L1 channel to L2 channel separation line input	0-dB PGA gain, –1-dB input signal, master mode			–105		dB
	R1 channel to R2 channel separation line input	0-dB PGA gain, –1-dB input signal, master mode			–105		dB
	L1 channel to L2 channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode			–105		dB
	R1 channel to R2 channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode			–105		dB
	Range of analog PGA	–12 to +12 dB (1-dB step), 20 dB, and 32 dB		–12⁽²⁾		32	dB
	Accuracy of PGA + ADC				0.5		dB
	Matching between PGA + ADCs on-chip				0.05		dB
	Full-scale voltage input	Single-ended mode				2.1	V_RMS
	Full-scale voltage input	Differential mode (2.1 V_RMS per pin)				4.2	V_RMS
	Input channel signal-to-noise ratio, single-ended input	0-dB PGA gain, –60-dB input signal, master mode at SE input	PCM1860 PCM1862 PCM1864		103		dB
		0-dB PGA gain, –60-dB input signal, master mode at SE input	PCM1861 PCM1863 PCM1865		106		dB
		32-dB PGA gain, –92-dB input signal, master mode at SE input			75		dB
	Input channel THD+N, single-ended input	0-dB PGA gain, –1-dB input signal, master mode at SE input			87		dB
	Input channel THD+N, single-ended input	32-dB PGA gain, –33-dB input signal, master mode at SE input			68		dB
	Input impedance per analog input pin	PCM1864 and PCM1865			10		kΩ
	Input impedance per analog input pin	PCM1860, PCM1861, PCM1862, and PCM1863			20		kΩ
CMRR	Common-mode rejection ratio	Differential input, 1-kHz signal on both pins and measure level at output			56		dB
SECONDARY ADC PERFORMANCE
	Default Energysense signal detection threshold	At 1 kHz			–57		dBFS
	Energysense signal bandwidth				10		kHz
	Energysense accuracy⁽²⁾				3		dB
	Secondary ADC accuracy				12		bits
	Secondary ADC sampling rate			8		192	kHz

(1) 32-dB gain when using differential mode inputs is only available in SW-controlled devices.

(2) Specified by design.

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7.5 Electrical Characteristics: PGA and ADC AC Performance