9.3.10.2 Secondary ADC: Energysense and Analog Control

The PCM186x has a secondary ADC, shown in Figure 35, that is used for signal level detection or dc level change detection.

1. Reset ports not shown.

Figure 35. Secondary ADC Architecture

The secondary ADC has two main purposes in the PCM186x family. The primary purpose is to act as a low power signal detection system, to aid with system wakeup from sleep. TI calls this functionality energysense. Other functionality includes the ability to use any spare analog inputs as generic ADC inputs, for connection to simple analog sources, such as voltages from control potentiometers. TI calls this functionality controlsense or dc control.

The secondary ADC is a one-bit, delta-sigma type ADC. The sampling rate is directly connected to the main ADC audio sampling clocks during ACTIVE functionality. When the device is in sleep state, then the secondary ADC switches the clock source to an on-chip oscillator (if there are no other clock sources).

In sleep mode, the inputs are all treated as single-ended inputs. Differential inputs are not supported in this mode because the PGA must be powered up, and thus, consume more power.

In active mode, energysense audio signal detection on any channels other than the primary is not available; however, other inputs can be read using the secondary ADC channel driven in controlsense mode.

In sleep mode, each input pin can be configured to perform either energysense or controlsense. Both functions can generate interrupts when their thresholds are crossed. All inputs will be cycled through and converted continuously, performing either an enerysense or a controlsense function.

In active mode, any dc based controls will either need to be polled continuously by the systems host, or streamed out continuously in a 6ch TDM mode. In an application, this may mean that the main input is being converted, while the system battery level, or analog volume control knob position is polled using controlsense.

To make the secondary ADC as flexible as possible in both energysense and controlsense modes, the following controls and coefficients are available in the register map. More details on each are in the relevant following sections.

• Coefficients for the secondary ADC low-pass filter
• Coefficients for the secondary ADC high-pass filter
• Reference voltage and interrupt voltage delta for each input in controlsense mode
• Signal loss conditions (time and threshold)
• Signal resume conditions (threshold)
• Interrupt behavior (for example, ping every x ms if host does not clear)
• Scan time for each single ended input