9.3.11.1 Energysense Signal Loss Flag

The main ADC constantly monitors the input signal level while in ACTIVE mode. Should the input level remain below a register defined threshold (for example –60 dB - Virtual Coefficient 0x2C, programmable through Page 1.) for a register defined amount of time (for example 1 minute - set by SIGDET_LOSS_TIME (Page.0, 0x33) ), an interrupt can be generated.

If the system MCU decides to move to sleep mode, the PCM186x can be moved to SLEEP by stopping BCK/LRCK or using PWRDN_CTRL (Page.0, 0x70); see Table 17 for details.

If BCK and LRCK are stopped by the host after the interrupt, the device goes to the sleep state as shown in Figure 37. Otherwise, the interrupt continues for a few seconds, defined by SIGDET_INT_INTVL (Page.0, 0x36) unless the interrupt and timeout counter is reset.

Figure 37. Energysense Signal Loss

In a typical application, the host MCU will note and reset this register multiple times until a system sleep number is hit. For example, a 5-minute signal loss could be implemented by using the default 1-minute timeout on the PCM186x, and counting five interrupts. An example is shown in Figure 38.

Figure 38. Interrupt Behavior for Signal Loss

Alternatively, the SIGDET_LOSS_TIME (Page.0, 0x33) register in the device can be changed from one minute (default) to five minutes. This timeout is sample rate dependant. The expected sample rate is 48 kHz, but should the system be running at 96 kHz, then the time will be halved. (192 kHz = quarter the register setting).

The duration of the interrupt can also be modified using INT_PLS (Page.0 0x62) to be pulses, or to be a sticky flag, where sticky is defined as the interrupt is on until cleared.