9.3.16.4 Time Division Multiplex (TDM Support)

The software-controlled devices can support TDM for both slave and master modes. In many devices, this is also known as DSP Mode.

Data on the TDM stream can be between two and four channels of audio content from each PCM186x mixer output. By default, each mixer passes data from the respective ADC in a bypass or passthrough configuration. Data from the secondary ADC can also be output on channels five and six. The frame rate in TDM mode fixed to 256 BCK per frame, and the duty cycle of the LRCK (or frame sync signal) can be either a 50 / 50 duty cycle, or a single bit at the start of the frame.

Up to 32 bits per channel are available. In 32-bit mode, 24 bits of data and 8 bits of padding (zero) are used per channel. In 24-, 20-, and 16-bit data, no padding is provided between channels. In 24-bit mode, channel two begins transmitting on bit clock 25.

In data formats lower than 24 bits, the data is simply truncated, not dithered to 16 bits.

In slave mode, only a rising edge on the first bit is required to start the frame. (similar to MSB-first, left-justified).

In master mode, only a 50% duty cycle on the output is possible. This configuration is made by setting TDM_LRCK_MODE (Page.0 0x0B) to 0.

Typically when interfacing to a DSP, only the rising edge on the first bit of data of the frame is required.

While the device is not transmitting data (but still being clocked), the DOUT pin will be Hi-Z (high impedance) to allow other devices on the bus to transmit their data.

TDM mode is configured using I2S_FMT (Page.0 0x0B), TDM_LRCK_MODE (Page.0 0x0B), TDM_OSEL (Page.0 0x0C)

The timing limits for the interface signals are defined by the Serial Audio Data Interface Configuration section with the addition that the BCK period minimum must be at least 1 / (512 × f_S) to make sure that data is clocked in correctly.

The audio format is shown in Figure 46. The 24-bit data can fit up to 10 channels of data in a 256x bitclock stream; however, the I²C-controlled devices only have two possible I²C addresses. The eight channels of audio data should be no issue.

Figure 46. Audio Format for TDM