ZHCSCB3D March 2014 – March 2018 PCM1860 , PCM1861 , PCM1862 , PCM1863 , PCM1864 , PCM1865
PRODUCTION DATA.
Background: The device is in sleep mode, with the wake threshold set as a DSP memory coefficient.
INT_STAT (Page.0 0x61) is sticky and SIGDET_STAT (Page.0 0x32) is not sticky in this mode. The Interrupt pin triggers dynamically as the audio crosses the threshold. The SIGDET_STAT (Page.0 0x32) register shows which input is causing the input only while that particular input is causing the interrupt. The INT_STAT (Page.0 0x61) register shows the energysense interrupt has been triggered until it is cleared.
The system host controller responds to the interrupt in one of two ways:
Option 1: Move to active mode. PWRDN_CTRL (Page.0 0x70)
Option 2: Ignore the interrupt in the system controller, or disable the interrupt for a set amount of time using INT_EN (Page.0 0x60)