ZHCSAC2C August 2012 – October 2018 PCM5121 , PCM5122
PRODUCTION DATA.
The PCM512x has a zero-detect function. When the device detects the continuous zero data for both left and right channels, or separate channels, Analog mutes are set to both OUTL and OUTR, or separate OUTL and OUTR. These are controlled by Page 0, Register 65, D(2:1) as shown in Table 5.
Continuous Zero data cycles are counted by LRCK, and the threshold of decision for analog mute can be set by Page 0, Register 59, D(6:4) for L-ch, and D(2:0) for Rch as shown in Table 6. Default values are 0 for both channels.
In Hardware mode, the device uses default values. By default, Both L-ch and R-ch have to be zero data for zero data detection to begin the muting process etc.
| ATMUTECTL | VALUE | FUNCTION |
|---|---|---|
| Bit : 2 | 0 | Independently L-ch or R-ch are zero data for zero data detection |
| 1 (Default) | Both L-ch and R-ch have to be zero data for zero data detection | |
| Bit : 1 | 0 | Zero detection and analog mute are disabled for R-ch |
| 1 (Default) | Zero detection analog mute are enabled for R-ch | |
| Bit : 0 | 0 | Zero detection analog mute are disabled for L-ch |
| 1 (Default) | Zero detection analog mute are enabled for L-ch |
| ATMUTETIML / ATMUTETIMR | NUMBER OF LRCKs | TIME AT 48 kHz |
|---|---|---|
| 0 0 0 | 1024 | 21 ms |
| 0 0 1 | 5120 | 106 ms |
| 0 1 0 | 10240 | 213 ms |
| 0 1 1 | 25600 | 533 ms |
| 1 0 0 | 51200 | 1.066 sec |
| 1 0 1 | 102400 | 2.133 sec |
| 1 1 0 | 256000 | 5.333 sec |
| 1 1 1 | 512000 | 10.66 sec |